Chip package and manufacturing method thereof
First Claim
Patent Images
1. A chip package, comprising:
- a substrate having an upper surface;
at least one chip disposed on the substrate and electrically connected to the substrate;
a molding compound disposed over the substrate and exposing portions of the substrate upper surface;
an electromagnetic interference (EMI) shield includinga first portion disposed over an upper surface of the molding compound;
a second portion forming a plurality of conductive connectors disposed in spaced through holes circumscribing a lateral periphery of the molding compound, a lateral surface of at least one of the plurality of conductive connectors being concave; and
a third portion disposed over all portions of the substrate upper surface exposed from the molding compound.
0 Assignments
0 Petitions
Accused Products
Abstract
A chip package including a shielding layer having a plurality of conductive connectors for better electromagnetic interferences shielding is provided. The conductive connectors can be flexibly arranged within the molding compound for better shielding performance. The shielding layer having the conductive connectors functions as the EMI shield and the shielding layer is electrically grounded within the package structure.
-
Citations
20 Claims
-
1. A chip package, comprising:
-
a substrate having an upper surface; at least one chip disposed on the substrate and electrically connected to the substrate; a molding compound disposed over the substrate and exposing portions of the substrate upper surface; an electromagnetic interference (EMI) shield including a first portion disposed over an upper surface of the molding compound; a second portion forming a plurality of conductive connectors disposed in spaced through holes circumscribing a lateral periphery of the molding compound, a lateral surface of at least one of the plurality of conductive connectors being concave; and a third portion disposed over all portions of the substrate upper surface exposed from the molding compound. - View Dependent Claims (2, 3, 4, 5, 6, 7)
-
-
8. A semiconductor package comprising:
-
a substrate having an upper surface; a chip electrically connected to the substrate; a package body encapsulating the chip and leaving portions of the substrate upper surface exposed; and means for electromagnetic interference (EMI) shielding, including first horizontal shielding means for protecting an upper surface of the package body from EMI; vertical shielding means for protecting lateral surfaces of the package body from EMI; and second horizontal shielding means for covering all of the portions of the substrate upper surface exposed from the package body. - View Dependent Claims (9, 10, 11, 12, 13, 14, 15)
-
-
16. A chip package, comprising:
-
a substrate having an upper surface; at least one chip electrically connected to the substrate; a molding compound encapsulating the chip and defining a lateral surface the molding compound leaving portions of the substrate upper surface adjacent a periphery thereof exposed; an electromagnetic interference (EMI) shield including a first portion disposed over an upper surface of the molding compound; a second portion circumscribing the chip and including a plurality of conductive connectors spaced from one another, a lateral surface of at least one of the plurality of conductive connectors being recessed from the lateral surface of the molding compound; and a third portion covering all of the exposed portions of the upper surface of the substrate. - View Dependent Claims (17, 18, 19, 20)
-
Specification