Efficient use of physical address space for data overflow and validation

• US 8,667,366 B1
• Filed: 11/18/2010
• Issued: 03/04/2014
• Est. Priority Date: 04/17/2009
• Status: Active Grant

• Current Assignee: Innovations In Memory LLC
• Original Assignee: Violin Memory Incorporated
• Inventors: de la Iglesia, Erik
• Primary Examiner(s): LAMARRE, GUY J
• Application Number:
  US12/949,372
• Time in Patent Office: 1,202 Days
• Field of Search: 714/758, 714/763
• US Class Current: 714/763
• CPC Class Codes: G06F 11/1004 to protect a block of data words, e.g. CRC or checksum G06F11/1076 takes precedence; security arrangements for protecting computers or computer systems against unauthorized activity G06F21/00
• CPC Class Codes: G06F 3/0611 in relation to response time
• CPC Class Codes: G06F 3/0619 in relation to data integrity, e.g. data losses, bit errors
• CPC Class Codes: G06F 3/0656 Data buffering arrangements
• CPC Class Codes: G06F 3/0659 Command handling arrangements, e.g. command buffers, queues, command scheduling
• CPC Class Codes: G06F 3/0683 Plurality of storage devices

Abstract

A storage access system stores block data into physical address blocks in a storage media. A last one of the physical address blocks that is either unfilled or only partially filled with the block data is used for storing extra data associated with the data blocks. A first portion of the last one of the physical storage blocks may be reserved for overflow data for different sizes of the block data. A second portion of the last one of the physical storage blocks may be used to store the validation information for the block data.

Claims

1. A storage access system, comprising:

a processor having an associated memory, the processor in communication with a storage media and configured to;

receive data for multiple write operations to the storage media;

aggregate the data into a data block;

identify physical address blocks in the storage media for writing the data block;

identify extra space in one of the physical address blocks; and

store validation information associated with the data block in the extra space.

2. The storage access system of claim 1 wherein the processor is further configured to reserve at least some of the extra space for different sizes of the data received for the write operations.

3. The storage access system of claim 1 wherein the processor is further configured to:

identify an additional one of the physical address blocks more than needed to store the block data; and

store the validation information in the additional one of the physical address blocks.

4. The storage access system of claim 1 wherein the processor is further configured to:

load the data block into the physical address blocks;

identify a last one of the physical address blocks that is unfilled or only partially filled with the data block;

reserve a first portion of the last one of the physical address blocks for overflow data for variable sizes of the data; and

use a second portion of the last one of the physical storage blocks to store the validation information.

5. The storage access system of claim 1 wherein the validation information comprises an address for one of the write operations.

6. The storage access system of claim 1 wherein validation information comprises a write count indicating a number of times the data has been written to the storage media.