Unbounded transactional memory system and method
First Claim
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1. An unbounded transactional memory system, comprising:
- a host processor comprising;
an execution unit configured to perform a transaction; and
a cache configured to temporarily store data;
a memory; and
a memory processor configured to store overflow data in overflow storage included in the memory in response to an overflow event in which the overflow data is generated in the cache during the transaction,wherein the cache comprises a plurality of cache sets, each cache set comprising a plurality of cache lines, each cache line comprising a T bit configured to indicate whether the cache line is accessed by a transaction, each cache set comprising an O bit configured to indicate whether the cache set has overflowed.
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Abstract
An unbounded transactional memory system which can process overflow data. The unbounded transactional memory system may include a host processor, a memory, and a memory processor. The host processor may include an execution unit to perform a transaction, and a cache to temporarily store data. The memory processor may store overflow data in overflow storage included in the memory in response to an overflow event in which the overflow data is generated in the cache during the transaction.
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Citations
18 Claims
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1. An unbounded transactional memory system, comprising:
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a host processor comprising; an execution unit configured to perform a transaction; and a cache configured to temporarily store data; a memory; and a memory processor configured to store overflow data in overflow storage included in the memory in response to an overflow event in which the overflow data is generated in the cache during the transaction, wherein the cache comprises a plurality of cache sets, each cache set comprising a plurality of cache lines, each cache line comprising a T bit configured to indicate whether the cache line is accessed by a transaction, each cache set comprising an O bit configured to indicate whether the cache set has overflowed. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. An unbounded transactional memory system, comprising:
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a host processor comprising; an execution unit configured to perform a transaction; and a cache configured to temporarily store data; a memory; and a memory processor configured to store overflow data in overflow storage included in the memory in response to an overflow event in which the overflow data is generated in the cache during the transaction, wherein; in response to the transaction that causes the overflow event being aborted, the host processor is configured to generate an abort_transaction event; and the memory processor is further configured to invalidate the overflow data from the overflow storage in response to the abort_transaction event. - View Dependent Claims (11)
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12. A method of operating a unbounded transactional memo system comprising a host processor comprising an execution unit to perform a transaction and a cache to temporarily store data, a memory, and a memory processor interposed between the host processor and the memory, the method comprising:
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generating an overflow event in response to data being overflowed in the cache of the host processor that is performing the transaction; and in response to the overflow event, storing the overflow data in overflow storage included in the memory using the memory processor, wherein the cache comprises a plurality of cache sets, each cache set comprising a plurality of cache lines, each cache line comprising a T bit indicating whether the cache line is accessed by a transaction, each cache set comprising an O bit indicating whether the cache set has been overflowed. - View Dependent Claims (13, 14, 15, 16)
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17. A method of operating a unbounded transactional system comprising a host processor comprising an execution unit to perform a transaction and a cache to temporarily store data, a memory, and a memory processor interposed between the host processor and the memory, the method comprising:
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generating an overflow event in response to data being overflowed in the cache of the host processor that is performing the transaction; in response to the overflow event, storing the overflow data in overflow storage included in the memory using the memory processor; generating, at the host processor, an abort_transaction event in response to the transaction that causes the overflow event being aborted; and invalidating, at the memory processor, the overflow data from the overflow storage in response to the abort_transaction event. - View Dependent Claims (18)
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Specification