System and method for providing a variable refresh rate of an interferometric modulator display

• US 8,878,825 B2
• Filed: 07/08/2005
• Issued: 11/04/2014
• Est. Priority Date: 09/27/2004
• Status: Active Grant

• Current Assignee: Snaptrack Incorporated (Qualcomm, Inc.)
• Original Assignee: Qualcomm MEMS Technologies Incorporated (Qualcomm, Inc.)
• Inventors: Kothari, Manish, Chui, Clarence, Sethi, Gaurav, Sampsell, Jeffrey B.
• Primary Examiner(s): Awad, Amr
• Assistant Examiner(s): BRAY, STEPHEN A
• Application Number:
  US11/178,036
• Publication Number:
  US 20060066601A1
• Time in Patent Office: 3,406 Days
• Field of Search: 345/204, 345 84- 85, 345 87-104, 345/107
• US Class Current: 345/204
• CPC Class Codes: G02B 26/001 based on interference in an adjustable optical cavity interference filters G02B5/28; devices or arrangements using multiple reflections in spectrometry or monochromators G01J3/26
• CPC Class Codes: G09G 2310/0275 Details of drivers for data electrodes, other than drivers for liquid crystal, plasma or OLED displays, not related to handling digital grey scale data or to communication of data to the pixels by means of a current
• CPC Class Codes: G09G 2310/04 Partial updating of the display screen
• CPC Class Codes: G09G 3/3466 based on interferometric effect
• CPC Class Codes: G09G 5/395 Arrangements specially adapted for transferring the contents of the bit-mapped memory to the screen G09G5/399 takes precedence

Abstract

Embodiments includes methods and systems for updating display devices at a variable refresh rate. One embodiment includes a method of updating an image displayed on a display device. The method includes setting an indicator to a first state that indicates that image data has been received subsequent to a previous update of a display device and periodically updating at least a portion of the display device to display the image. The updating is deferred for at least one period when the indicator is in a state other than the first state. In another embodiment, updates of the display are substantially asynchronous and occur as the processor writes data to one or more shift registers. When a shift register is filled, for example, having received data for a row within the display, the data in the shift register is written to the display. Other embodiments include methods of manufacturing such devices.

Claims

1. A method of updating an image displayed on a display device, the method comprising:

asynchronously storing image data at a memory;

setting an indicator to a first state that indicates that said image data has been received subsequent to a previous update of the display device;

periodically polling the indicator according to a predetermined polling frequency to determine whether the indicator is set to the first state;

in response to the periodic polling determining that the indicator is set to the first state, providing the received image data from the memory to the display device to update at least a portion of said display device to display the image by writing at least a portion of the image data to the portion of the display device, wherein the image data is not written to the portion of the display device unless the indicator is in the first state; and

altering the predetermined polling frequency based, at least in part, on a rate at which the image data is asynchronously stored at the memory.

2. The method of claim 1, wherein updating at least a portion of said display comprises setting said indicator to a second state.

3. The method of claim 1, wherein setting the state of said indicator comprises storing a value to the memory.

4. A device for driving a display device, the device comprising:

a frame buffer configured to asynchronously receive data indicative of an image;

an output circuit configured to generate a signal for updating the display device to display the image, said updating including asynchronously writing, in response to receiving the data, at least a portion of the data indicative of the image from the frame buffer to the display device;

a memory operably connected to the frame buffer and configured to indicate that said frame buffer has received data subsequent to updating said display device;

a controller configured to periodically poll the memory based on a predetermined polling frequency to determine whether the memory indicates that said frame buffer has received the data subsequent to updating said display device and to control said output circuit to defer generating said signal until said memory indicates that said frame buffer has received the data subsequent to updating; and

a processor configured to alter the predetermined polling frequency based, at least in part, on a rate at which the data indicative of the image is asynchronously received at the frame buffer,

wherein the data indicative of the image is not written to said display device while said controller defers generating said signal.

5. The device of claim 4, wherein the controller is configured to determine, whether at least a portion of the memory indicates that said frame buffer has received data subsequent to updating of said display.

6. The device of claim 4, further comprising:

a processor configured to provide the data indicative of the image to the frame buffer.

7. The device of claim 4, wherein the display device comprises a plurality of display elements arranged in a plurality of lines, and wherein the content of the memory indicates whether the driver has updated each of the plurality of lines of the display device to display a corresponding portion of the image.

8. The device of claim 7, wherein the lines comprise rows.

9. The device of claim 7, wherein the lines comprise columns.

10. The device of claim 7, wherein the controller is configured to control whether the driver generates a strobe signal for each of the lines based on the content of the memory.

11. The device of claim 4, wherein the frame buffer is configured to receive the data over a bus, and wherein the memory is operably connected to the bus.

12. The device of claim 11, wherein the content of the memory is updated in response to receiving a write signal over the bus.

13. The device of claim 4, wherein the content of the memory is changed in response to the output circuit generating the signal.

14. The device of claim 13, wherein the controller changes the content of the memory.

15. The device of claim 13, wherein the output circuit is operably connected to the memory and configured to change the content of the memory.

16. An electronic device, the device comprising:

a display device;

a frame buffer configured to asynchronously receive image data;

a driver circuit configured to generate a signal for writing to said display device to display said image data;

a memory operably connected to the frame buffer and configured to indicate that said frame buffer has received data subsequent to information being written to said display, the memory configured to be periodically polled according to a predetermined polling frequency to determine whether the memory indicates that said frame buffer has received data subsequent to information being written;

a processor configured to alter the predetermined polling frequency based, at least in part, on a rate at which the image data is asynchronously stored at the frame buffer,

wherein said driver circuit is configured to generate said signal only in response to said periodic polling determining that the memory indicates that said frame buffer has received data subsequent to information being written to said display; and

in response to the signal, providing the received image data from the frame buffer to the display.

17. The electronic device of claim 16, further comprising:

a processor that is in electrical communication with said display, said processor being configured to process the image data;

a memory device in electrical communication with said processor.

18. The electronic device of claim 16, further comprising:

an image source module configured to send said image data to said processor.

19. The electronic device of claim 18, wherein said image source module comprises at least one of a receiver, transceiver, and transmitter.

20. The electronic device of claim 19, further comprising:

an input device configured to receive input data and to communicate said input data to said processor.

21. A device for driving a display device, the device comprising:

means for asynchronously receiving and storing data indicative of an image;

means for generating a signal for updating the display device to display said image, said updating including asynchronously writing, in response to receiving the signal at least a portion of the stored data to the display device;

means for setting an indicator indicating that said means for receiving and storing has received data subsequent to updating of said display device;

means for periodically polling said indicator according to a predetermined periodic polling frequency to determine whether the indicator is set;

means for controlling said means for generating to defer generating said signal until said polling determines that the indicator is set to indicate that said means for receiving and storing has received data subsequent to updating; and

means for altering the predetermined polling frequency based, at least in part, on a rate at which the data indicative of the image is asynchronously received,

wherein the data indicative of the image is not written to said display device while said controlling means defers generating said signal.

22. The device of claim 21, wherein the display device comprises a plurality of display elements arranged in a plurality of lines, and wherein the indicator indicates whether the means for generating has updated each of the plurality of lines of the display device to display a corresponding portion of the image.

23. A device for driving a display device, the device comprising:

a shift register configured to asynchronously receive data indicative of a portion of an image, the shift register having only enough memory to store data for said portion, wherein the shift register is further configured to generate an indication signal indicating that the shift register has been filled with the received data, the indication signal configured to be periodically polled based on a predetermined polling frequency to determine whether the indication signal indicates that the shift register has been filled;

a processor configured to provide the data to the shift register; and

an output circuit configured to update a display device to display the portion of the image,

wherein the shift register is configured to provide the received data to the output circuit in response to the periodic polling determining that the indication signal has been generated, and the processor further configured to alter the predetermined polling frequency based, at least in part, on a rate at which the data indicative of the portion of the image is asynchronously received at the shift register.

24. The device of claim 23, further comprising:

a display device in electrical communication with said output circuit; and

a memory device in electrical communication with said processor,

wherein the processor is in electrical communication with said display device, and wherein the processor is configured to serially write the data to the shift register, as the processor generates the data, without the use of a frame buffer.

25. The device of claim 24, further comprising:

a bus, wherein the processor is configured to asynchronously provide the data to the shift register over the bus.

26. The device of claim 25, wherein said bus comprises a serial bus.

27. The device of claim 24, further comprising:

an image source module configured to send said image data to said processor.

28. The device of claim 27, wherein said image source module comprises at least one of a receiver, transceiver, and transmitter.

29. The device of claim 24, further comprising:

an input device configured to receive input data and to communicate said input data to said processor.

33. The device of claim 23, wherein the shift register has only enough memory to store data for a single row of the display device.

34. The device of claim 33, wherein the output circuit is configured to strobe a row of the display device corresponding to the received data while converting the received data to column voltage signals.

30. A device for driving a display device, the device comprising:

means for asynchronously receiving a single line of data indicative of a portion of an image;

means for generating an indication that the single line of data has been received by the means for asynchronously receiving;

means for providing the data to the means for asynchronously receiving;

means for periodically polling said indication according to a predetermined periodic polling frequency to determine whether the indication indicates data has been received;

means for updating the display device to display said portion of the image in response to the polling determining that the indication indicates data has been received; and

means for altering the predetermined polling frequency based, at least in part, on a rate at which single lines of data indicative of portions of the image is asynchronously received,

wherein the means for asynchronously receiving includes means for providing said single line of data to the means for updating upon receiving the single line of data and before receiving another line of data.

31. The device of claim 30, further comprising:

means for storing data in electrical communication with said processing means,

wherein the means for providing includes means for serially writing the data directly to the means for asynchronously receiving as the means for providing generates the data.

32. The device of claim 31, further comprising:

means for communicating data, wherein said means for processing is configured to provide the data to the means for asynchronously receiving over the means for communicating data.