Method and apparatus improving gate oxide reliability by controlling accumulated charge
First Claim
1. An RF switch, comprising:
- a first RF port;
a second RF port;
a first switch transistor grouping coupled with the first and second RF ports, and controlled by a first switch control signal, the first switch transistor grouping comprising a first plurality of switch NMOSFETs arranged in a stacked configuration;
a shunt transistor grouping coupled with the first RF port and with ground, and controlled by a shunt control signal, the shunt transistor grouping comprising a plurality of shunt NMOSFETs arranged in a stacked configuration, wherein at least one of the plurality of shunt NMOSFETs comprises a first body and a first accumulated charge sink (ACS) coupled with the first body and configured so that when the at least one shunt NMOSFET is disabled, a first negative bias voltage that is substantially negative with respect to ground applied to the first ACS substantially prevents accumulated charge from accumulating in the first body of the at least one shunt NMOSFET; and
a silicon-on-insulator substrate, wherein the first switch transistor grouping and the shunt transistor grouping are fabricated in a silicon layer of the silicon-on-insulator substrate so that when the first switch transistor grouping is enabled by the first switch control signal and the shunt transistor grouping is disabled by the shunt control signal, a signal on the first RF port is passed through to the second RF port, and when the first switch transistor grouping is disabled by the first switch control signal and the shunt transistor grouping is enabled by the shunt control signal, the signal on the first RF port is grounded.
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Accused Products
Abstract
A method and apparatus are disclosed for use in improving the gate oxide reliability of semiconductor-on-insulator (SOI) metal-oxide-silicon field effect transistor (MOSFET) devices using accumulated charge control (ACC) techniques. The method and apparatus are adapted to remove, reduce, or otherwise control accumulated charge in SOI MOSFETs, thereby yielding improvements in FET performance characteristics. In one embodiment, a circuit comprises a MOSFET, operating in an accumulated charge regime, and means for controlling the accumulated charge, operatively coupled to the SOI MOSFET. A first determination is made of the effects of an uncontrolled accumulated charge on time dependent dielectric breakdown (TDDB) of the gate oxide of the SOI MOSFET. A second determination is made of the effects of a controlled accumulated charge on TDDB of the gate oxide of the SOI MOSFET. The SOI MOSFET is adapted to have a selected average time-to-breakdown, responsive to the first and second determinations, and the circuit is operated using techniques for accumulated charge control operatively coupled to the SOI MOSFET. In one embodiment, the accumulated charge control techniques include using an accumulated charge sink operatively coupled to the SOI MOSFET body.
361 Citations
104 Claims
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1. An RF switch, comprising:
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a first RF port; a second RF port; a first switch transistor grouping coupled with the first and second RF ports, and controlled by a first switch control signal, the first switch transistor grouping comprising a first plurality of switch NMOSFETs arranged in a stacked configuration; a shunt transistor grouping coupled with the first RF port and with ground, and controlled by a shunt control signal, the shunt transistor grouping comprising a plurality of shunt NMOSFETs arranged in a stacked configuration, wherein at least one of the plurality of shunt NMOSFETs comprises a first body and a first accumulated charge sink (ACS) coupled with the first body and configured so that when the at least one shunt NMOSFET is disabled, a first negative bias voltage that is substantially negative with respect to ground applied to the first ACS substantially prevents accumulated charge from accumulating in the first body of the at least one shunt NMOSFET; and a silicon-on-insulator substrate, wherein the first switch transistor grouping and the shunt transistor grouping are fabricated in a silicon layer of the silicon-on-insulator substrate so that when the first switch transistor grouping is enabled by the first switch control signal and the shunt transistor grouping is disabled by the shunt control signal, a signal on the first RF port is passed through to the second RF port, and when the first switch transistor grouping is disabled by the first switch control signal and the shunt transistor grouping is enabled by the shunt control signal, the signal on the first RF port is grounded. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46)
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47. A circuit routing RF signals, comprising:
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a first RF port; a second RF port; a third RF port; a plurality of stacked shunt NMOSFETs coupled with the first RF port and ground, and controlled by a shunt control signal, wherein at least one of the plurality of stacked shunt NMOSFETs comprises a first body and a first accumulated charge sink (ACS) coupled with the first body and configured so that when the at least one shunt NMOSFET is disabled, a first negative bias voltage that is substantially negative with respect to ground applied to the first ACS substantially prevents accumulated charge from accumulating in the first body of the at least one shunt NMOSFET; a first plurality of first stacked switch NMOSFETs coupled with the first and second RF ports, and controlled by a first switch control signal, wherein at least one of the first plurality of first switch NMOSFETs has a second body and a second accumulated charge sink (ACS) coupled with the second body and configured so that when the at least one first switch NMOSFET is disabled, a second negative bias voltage that is substantially negative with respect to ground applied to the second ACS substantially prevents accumulated charge from accumulating in the second body of the at least one first switch NMOSFET; a second plurality of second stacked switch NMOSFETs coupled with the second and third RF ports, wherein at least one of the second plurality of second switch NMOSFETs has a third body and a third accumulated charge sink (ACS) coupled to the third body and configured so that when the at least one second switch NMOSFET is disabled, a third negative bias voltage that is substantially negative with respect to ground applied to the third ACS substantially prevents accumulated charge from accumulating in the third body; and a silicon-on-insulator substrate, wherein the shunt, first switch and second switch NMOSFETs are fabricated in a silicon layer of the silicon-on-insulator substrate. - View Dependent Claims (48, 49, 50)
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51. An RF switch, comprising:
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a first RF port; a second RF port; a first switch transistor grouping coupled to the first RF port and to the second RF port and comprising a first plurality of switch NMOSFETs arranged in a stacked configuration; a first shunt transistor grouping coupled to the first RF port and to ground and comprising a first plurality of shunt NMOSFETs arranged in a stacked configuration, wherein at least one of the first plurality of shunt NMOSFETs comprises a first gate, a first source, a first drain, a first body, and a first accumulated charge sink (ACS) coupled to the first body, wherein a first ACS bias voltage is applied to the first ACS, wherein the first ACS is in electrical communication with the first body and is configured so that when the at least one shunt NMOSFET of the first plurality of shunt NMOSFETs is operated in an off-state (non-conducting state), the first ACS bias voltage is substantially negative with respect to ground to substantially prevent accumulated charge from accumulating in the first body of the at least one shunt NMOSFET; and wherein the first switch transistor grouping and the first shunt transistor grouping are fabricated on a silicon-on-insulator substrate. - View Dependent Claims (52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70)
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71. An RF switch, comprising:
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a first RF port; a second RF port; a first switch transistor grouping coupled to the first RF port and to the second RF port and comprising a first plurality of switch NMOSFETs arranged in a stacked configuration; a first shunt transistor grouping coupled to the first RF port and to ground and comprising a first plurality of shunt NMOSFETs arranged in a stacked configuration, wherein at least one of the first plurality of shunt NMOSFETs comprises a first gate, a first source, a first drain, a first body, and a first accumulated charge sink (ACS) coupled to the first body, wherein a first ACS bias voltage is applied to the first ACS, wherein the first ACS is in electrical communication with the first body and is configured so that when the at least one shunt NMOSFET of the first plurality of shunt NMOSFETs is operated in an off-state (non-conducting state), the first ACS bias voltage is substantially more negative than the lesser of a first source bias voltage applied to the first source and a first drain bias voltage applied to the first drain to substantially prevent accumulated charge from accumulating in the first body of the at least one shunt NMOSFET; and wherein the first switch transistor grouping and the first shunt transistor grouping are fabricated on a silicon-on-insulator substrate. - View Dependent Claims (72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87)
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88. An RF switch, comprising:
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a first RF port; a second RF port; a first switch transistor grouping coupled to the first RF port and to the second RF port and comprising a first plurality of switch NMOSFETs arranged in a stacked configuration; a first shunt transistor grouping coupled to the first RF port and to ground and comprising a first plurality of shunt NMOSFETs arranged in a stacked configuration, wherein at least one of the first plurality of shunt NMOSFETs comprises a first gate, a first source, a first drain, a first body, a first accumulated charge sink (ACS) coupled to the first body, wherein the first ACS is positioned proximate a first distal end of the first body and is in electrical communication with the first body, and a second accumulated charge sink (ACS) coupled to the first body, wherein the second ACS is positioned proximate a second distal end of the first body and is in electrical communication with the first body, wherein a first ACS bias voltage is applied to the first ACS and second ACS, wherein, when the at least one shunt NMOSFET of the first plurality of shunt NMOSFETs is configured to operate in an off-state (non-conducting state), the first ACS bias voltage is substantially negative with respect to ground to substantially prevent accumulated charge from accumulating in the first body of the at least one shunt NMOSFET; and wherein the first switch transistor grouping and the first shunt transistor grouping are fabricated on a silicon-on-insulator substrate. - View Dependent Claims (89, 90, 91, 92, 93, 94, 95, 96)
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97. An RF switch, comprising:
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a first RF port; a second RF port; a first switch transistor grouping coupled to the first RF port and to the second RF port and comprising a first plurality of switch NMOSFETs arranged in a stacked configuration; a first shunt transistor grouping coupled to the first RF port and to ground and comprising a first plurality of shunt NMOSFETs arranged in a stacked configuration, wherein at least one of the first plurality of shunt NMOSFETs comprises a first gate, a first source, a first drain, a first body, a first accumulated charge sink (ACS) coupled to the first body, wherein the first ACS is positioned proximate a first distal end of the first body and is in electrical communication with the first body, and a second accumulated charge sink (ACS) coupled to the first body, wherein the second ACS is positioned proximate a second distal end of the first body and is in electrical communication with the first body, wherein a first ACS bias voltage is applied to the first ACS and second ACS, wherein, when the at least one shunt NMOSFET of the first plurality of shunt NMOSFETs is configured to operate in an off-state (non-conducting state), the first ACS bias voltage is substantially more negative than the lesser of a first source bias voltage applied to the first source and a first drain bias voltage applied to the first drain to substantially prevent accumulated charge from accumulating in the first body of the at least one shunt NMOSFET; and wherein the first switch transistor grouping and the first shunt transistor grouping are fabricated on a silicon-on-insulator substrate. - View Dependent Claims (98, 99, 100, 101, 102, 103, 104)
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Specification