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Usage aware NUMA process scheduling

  • US 9,047,196 B2
  • Filed: 06/19/2012
  • Issued: 06/02/2015
  • Est. Priority Date: 06/19/2012
  • Status: Active Grant
First Claim
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1. A system comprising:

  • a plurality of processors, each of said processors belonging to one of a plurality of processor groups;

    a plurality of memory banks, each of said memory banks being assigned to one of said processor groups;

    said plurality of processors and said plurality of memory banks being comprised in a single device, each of said plurality of processor groups having communication access to each of said plurality of memory banks;

    an analysis engine that;

    receives executable code;

    identifies a functional block within said executable code by determining that said functional block has defined input and output memory objects and changes no other memory objects during execution; and

    transmits said functional block as said first process to said process scheduler; and

    a process scheduler that;

    receives a first process comprising instructions that operate on a first memory object;

    determines a first memory bank for containing said first memory object;

    selects a first processor being contained in a first processor group, said first processor group corresponding to said first memory bank; and

    executes said first process on said first processor.

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