Integrated circuit systems including vertical inductors

• US 9,159,711 B2
• Filed: 07/29/2011
• Issued: 10/13/2015
• Est. Priority Date: 07/29/2011
• Status: Expired due to Fees

• Current Assignee: GlobalFoundries, Inc.
• Original Assignee: GlobalFoundries, Inc.
• Inventors: Topaloglu, Rasit O.
• Primary Examiner(s): Nguyen, Chau N
• Assistant Examiner(s): VARGHESE, ROSHN K
• Application Number:
  US13/194,695
• Publication Number:
  US 20130027127A1
• Time in Patent Office: 1,537 Days
• Field of Search: 174/250, 336/200, 336/223, 336/232, 336/214
• US Class Current: 1/1
• CPC Class Codes: H01L 23/66 High-frequency adaptations
• CPC Class Codes: H01L 25/16 the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
• CPC Class Codes: H01L 25/162 the devices being mounted on two or more different substrates
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

An integrated circuit system is provided that includes a circuit function in and on a surface of a semiconductor substrate. First and second portions of an inductor overlie the surface of the semiconductor substrate and each is coupled to the first circuit function. A third portion of the inductor is positioned on a second substrate. A first through substrate via (TSV) extends through the semiconductor substrate and electrically couples the first portion to the third portion and a second TSV extends through the semiconductor substrate and electrically couples the second portion to the third portion.

Claims

1. An integrated circuit system comprising:

a first circuit function on a surface of a semiconductor substrate;

a first portion and a second portion of an inductor, an entirety of the first and second portions overlying the surface of the semiconductor substrate, the first and second portions being physically separated from one another on the surface of the semiconductor substrate, the first portion coupled to the circuit function;

a third portion of the inductor provided as a single conductive metal line, an entirety of the third portion overlying a second substrate, a majority of each of the first and second portions directly overlying and extending parallel to the third portion;

a first through substrate via extending through the semiconductor substrate and electrically and directly physically coupled to the first portion and the third portion;

a second through substrate via extending through the semiconductor substrate and electrically and directly physically coupled to the second portion and the third portion, wherein an entirety of the third portion is provided as the single conductive metal line and extends from the first through substrate via to the second through substrate via; and

wherein the first portion is coupled to and is in direct, physical connection with the circuit function, wherein the second portion is coupled to and is in direct, physical connection with the circuit function and wherein a minority of each of the first and second portions are offset from the third portion and extend perpendicularly to the third portion.

2. The integrated circuit system of claim 1 further comprising a plurality of through substrate vias spaced apart from and positioned between the first circuit function and the first portion and the second portion and configured to be coupled to ground.

3. The integrated circuit system of claim 1 wherein the second substrate comprises a second semiconductor substrate and wherein the second semiconductor substrate includes a second circuit function.

4. The integrated circuit system of claim 1 further comprising:

a third through substrate via electrically coupled to the first portion and the third portion; and

a fourth through substrate via electrically coupled to the second portion and the third portion.

5. The integrated circuit system of claim 1 wherein the second substrate comprises an interposer substrate having a plurality of semiconductor die mounted thereon.

6. The integrated circuit system of claim 1 wherein the first through substrate via and the second through substrate via extend through the semiconductor substrate from the surface to a back surface, the integrated circuit system further comprising a redistribution layer positioned overlying the back surface.

7. The integrated circuit system of claim 1 further comprising a second inductor comprising:

a fourth portion on the surface of the semiconductor substrate and coupled to the circuit function;

a fifth portion positioned on the second substrate; and

a plurality of through substrate vias coupling the fourth portion to the fifth portion to form an inductor loop.

8. The integrated circuit system of claim 1 wherein each of the first portion, second portion, third portion, first through substrate via and second through substrate via comprise copper.

9. The integrated circuit system of claim 1 further comprising:

a fourth portion of the inductor overlying the second substrate and a fifth portion of the inductor overlying the semiconductor substrate, the fifth portion coupled to the circuit function;

a third through substrate via extending through the semiconductor substrate and electrically coupled to the second portion and the fourth portion; and

a fourth through substrate via extending through the semiconductor substrate and electrically coupled to the fourth portion and the fifth portion.

10. The integrated circuit system of claim 1, wherein the minority portion of each of the first and second portions provides the coupling with and the direct, physical connection with the circuit function.

11. The integrated circuit system of claim 10, wherein each of the first and second portions comprise conductive metal lines, wherein a first end of the first portion is in direct, physical contact with the circuit function and a second end of the first portion is in direct, physical contact with the first through substrate via such that the first portion is not in direct, physical contact with the second through substrate via, and wherein a first end of the second portion is in direct, physical contact with the circuit traction and a second end of the second portion is in direct, physical contact with the second through substrate via such that the second portion is not in direct, physical contact with the first through substrate via.