Thin film transistor and display device

• US 9,236,496 B2
• Filed: 03/02/2012
• Issued: 01/12/2016
• Est. Priority Date: 03/11/2011
• Status: Active Grant

• Current Assignee: Sharp Kabushiki Kaisha (Hon Hai Precision Industry Co., Ltd.)
• Original Assignee: Sharp Kabushiki Kaisha (Hon Hai Precision Industry Co., Ltd.)
• Inventors: Katoh, Sumio, Kitakado, Hidehito
• Primary Examiner(s): BACHNER, ROBERT G
• Application Number:
  US14/002,794
• Publication Number:
  US 20130334530A1
• Time in Patent Office: 1,411 Days
• Field of Search: 257/E29.296, 257/43, 257/57, 257/59, 257/E21.46, 257/E27.111, 257/E21.04, 257/E21.293, 257/E21.413, 257/E21.414, 257/E21.476, 257/E21.704, 257/E27.121, 257/E29.002, 257/E29.278, 257/E29.283, 257/E33.003, 257/E33.004, 257/E33.053, 257/71, 257/72, 257/88, 438/104, 438/158, 438/149, 438/155, 438/792
• US Class Current: 1/1
• CPC Class Codes: H01L 27/1222 with a particular composition, shape or crystalline structure of the active layer
• CPC Class Codes: H01L 29/41733 for thin film transistors with insulated gate
• CPC Class Codes: H01L 29/78609 for preventing leakage current H01L29/78618 takes precedence
• CPC Class Codes: H01L 29/78618 characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure silicide contacts, electrodes in general H01L29/458
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
• CPC Class Codes: H01L 29/78693 the semiconducting oxide being amorphous
• CPC Class Codes: H01L 29/78696 characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel H01L29/78612 takes precedence; transistors having a drain offset region or a lightly doped drain [LDD] H01L29/78621
• CPC Class Codes: H01L 33/0041 characterised by field-effect operation

Abstract

The invention provides a thin film transistor that can reduce an off-current flowing in end-parts in a channel width direction of a channel layer and a manufacturing method therefor.

Claims

1. A thin film transistor provided on an insulating substrate, comprising:

a gate electrode provided on the insulating substrate;

a gate insulating film that covers the gate electrode;

a source electrode and a drain electrode provided on the gate insulating film with a predetermined distance, to sandwich the gate electrode; and

a channel layer made of an oxide semiconductor layer which is located in a region sandwiched between the source electrode and the drain electrode and of which one end and the other end are respectively electrically connected to the source electrode and the drain electrode, wherein

the channel layer includes two first regions each of which is positioned to respectively surround the source electrode and the drain electrode and has a first resistance value, and a second region sandwiched between the two first regions, extending to define entire end portions of the channel layer in a channel width direction, and having a second resistance value higher than the first resistance value, and

the first regions are not provided in the end portions of the channel layer in the channel width direction.

2. The thin film transistor according to claim 1, wherein the source electrode and the drain electrode are overlapped with the gate electrode in a planar view.

3. The thin film transistor according to claim 1, wherein the source electrode and the drain electrode are not overlapped with the gate electrode in a planar view.

4. The thin film transistor according to claim 3, wherein the first region is overlapped with the gate electrode in a planar view.

5. The thin film transistor according to claim 1, wherein one of the source electrode and the drain electrode is overlapped with the gate electrode in a planar view, and another one of the source electrode and the drain electrode is not overlapped with the gate electrode in a planar view.

6. The thin film transistor according to claim 2, wherein the source electrode covers one end of the channel layer, and the drain electrode covers another end of the channel layer.

7. The thin film transistor according to claim 2, further comprising an etching stopper layer that cover the second region, on the channel layer in a region sandwiched between an end portion of the source electrode and an end portion of the drain electrode,

wherein the source electrode and the drain electrode are respectively electrically connected to the two first regions of the channel layer via a contact hole formed in the etching stopper layer.

8. The thin film transistor according to claim 2, wherein one end of the channel layer is electrically connected to the source electrode by covering one end of the source electrode, and another end of the channel layer is electrically connected to the drain electrode by covering one end of the drain electrode.

9. The thin film transistor according to claim 2, further comprising an interlayer insulating layer which covers the source electrode and the drain electrode,

wherein one end of the channel layer is electrically connected to the source electrode via a contact hole opened in the interlayer insulating layer on the source electrode, and another end of the channel layer is electrically connected to the drain electrode via a contact hole opened in the interlayer insulating layer on the drain electrode.

10. The thin film transistor according to claim 1, wherein a desired combination of a channel length and a channel width is selected from among data of a plurality of combinations of channel lengths and channel widths determined such that an off-current becomes smaller than a predetermined current value.

11. The thin film transistor according to claim 1, wherein the channel layer is made of an indium gallium zinc oxide layer, and the source electrode and the drain electrode have a titanium film that is in contact with the indium gallium zinc oxide layer.

12. The thin film transistor according to claim 1, wherein the oxide semiconductor layer is made of a microcrystalline oxide semiconductor layer.

13. An active matrix-type display device for displaying an image, the device comprising:

the first thin film transistor according to claim 1;

an auxiliary capacitance portion including a lower electrode, an upper electrode, and an insulating film formed between the lower electrode and the upper electrode;

an intersection portion where a gate electrode of the first thin film transistor intersects with one of a source electrode and a drain electrode; and

a contact portion where the gate electrode is electrically connected to one of the source electrode and the drain electrode by a connection electrode, wherein

the lower electrode is defined when the gate electrode of the first thin film transistor is provided,

the upper electrode is defined when the source electrode and the drain electrode of the first thin film transistor are provided, and

the insulating film is defined when a gate insulating film of the first thin film transistor is provided.

14. An active matrix-type display device for displaying an image, the device comprising:

the thin film transistor according to claim 7;

an auxiliary capacitance portion including a lower electrode, an upper electrode, and an insulating film provided between the lower electrode and the upper electrode;

an intersection portion where a gate electrode of the thin film transistor intersects with one of a source electrode and a drain electrode; and

a contact portion where the gate electrode is electrically connected to one of the source electrode and the drain electrode by a connection electrode, wherein

the insulating film of the auxiliary capacitance portion includes a first insulating film defined when the gate insulating film of the thin film transistor is provided, and

the intersection portion includes the first insulating film, and a second insulating film defined when the etching stopper layer of the thin film transistor is provided.

15. The display device according to claim 13, wherein in the contact portion, the connection electrode which electrically connects the gate electrode to one of the source electrode and the drain electrode is made of a transparent metal film.