Semiconductor device

• US 9,287,373 B2
• Filed: 07/24/2014
• Issued: 03/15/2016
• Est. Priority Date: 03/12/2008
• Status: Active Grant

• Current Assignee: Infineon Technologies AG
• Original Assignee: Infineon Technologies AG
• Inventors: Zundel, Markus
• Primary Examiner(s): TAYLOR, EARL N
• Application Number:
  US14/339,923
• Publication Number:
  US 20140335667A1
• Time in Patent Office: 600 Days
• Field of Search: 438/279, 438/284, 438/599
• US Class Current: 1/1
• CPC Class Codes: H01L 29/40114 the electrodes comprising a conductor-insulator-conductor-insulator-semiconductor structure
• CPC Class Codes: H01L 29/407 Recessed field plates, e.g. trench field plates, buried field plates
• CPC Class Codes: H01L 29/41741 for vertical or pseudo-vertical devices
• CPC Class Codes: H01L 29/42372 characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out H01L29/42324 takes precedence
• CPC Class Codes: H01L 29/4238 characterised by the surface lay-out
• CPC Class Codes: H01L 29/66477 with an insulated gate, i.e. MISFET
• CPC Class Codes: H01L 29/7811 with an edge termination structure guard regions per se H01L29/0619; field plates per se H01L29/402
• CPC Class Codes: H01L 29/7813 with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

A semiconductor device includes an active area having a source and a gate. A gate metal contact is deposited above and forms an electrical contact with the gate and a source metal contact is deposited above and forms an electrical contact with the source. The source metal contact includes a plurality of metal through contacts positioned adjacent a side of the active area, the plurality of metal through contacts being spaced at intervals from one another and arranged in two or more rows.

Claims

1. A method of making a semiconductor device comprising:

providing an active area comprising a source and a gate;

depositing a gate metal contact above and forming an electrical contact with the gate, the gate metal contact arranged in a peripheral edge region of the semiconductor device; and

depositing a source metal contact, bordered by two opposite long sides and two opposite short sides, above and forming an electrical contact with the source and comprising a plurality of metal through contacts positioned adjacent a side of the active area and laterally positioned between the gate in a cell field of the semiconductor device and the gate metal contact, the plurality of metal through contacts comprising a single metal through contact on each of the two short sides and a plurality of metal through contacts arranged at intervals spaced from one another on each of the two long sides.

2. The method of claim 1, comprising disposing an electrically insulating layer between the source metal contact and the source and between the gate metal contact and the gate and wherein the metal through contacts extend through the electrically insulating layer and are disposed on the source.

3. The method of claim 1 wherein in plan view, the metal through contacts are elongate, a longer direction being arranged generally parallel to the side of the source metal contact.

4. The method of claim 1, comprising arranging the plurality of metal through contacts in two or more adjacent rows, and offsetting the metal through contacts of adjacent rows with respect to one another.

5. The method of claim 1, wherein in plan view, forming the metal through contacts to be funnel-shaped.

6. The method of claim 4, wherein one or more rows of metal through contacts comprise metal through contacts comprising a rectangular shape in plan view and one or two rows of metal through contacts comprise metal through contacts comprising a funnel-shape in plan view.

7. The method of claim 1, comprising arranging the metal through contacts in two or more rows in an offset arrangement such that a diffusion path takes on a meandering structure and a length of the diffusion path for mobile ions is increased.

8. The method of claim 4, comprising extending the gate in a meandering fashion between the metal through contacts.

9. The method of claim 1, wherein the semiconductor device comprises a top side having a central region and the peripheral edge region, and comprising providing the active area in the central region comprising the source and the gate and the cell field.

10. The method of claim 9, wherein the cell field includes a trench, and wherein the source and the gate are positioned in the trench.

12. The method of claim 10, wherein an insulating layer separates the source and the gate within the trench.

14. The method of claim 1, comprising depositing an oxide layer on the gate and extending over a top side of the semiconductor device,

wherein the plurality of metal through contacts extend through the oxide layer to a portion of the source arranged in the peripheral region, and

wherein the plurality of metal through contacts are electrically isolated from the gate by regions of the oxide layer.

11. A method of making a semiconductor device comprising:

providing an active area comprising a source and a gate;

depositing a gate metal contact above and forming an electrical contact with the gate; and

depositing a source metal contact, bordered by two opposite long sides and two opposite short sides above and forming an electrical contact with the source and comprising a plurality of metal through contacts positioned adjacent a side of the active area, the plurality of metal through contacts comprising a single metal through contact on each of the two short sides and a plurality of metal through contacts arranged at intervals spaced from one another on each of the two long sides;

wherein the semiconductor device comprises a top side having a central region and a peripheral edge region, and comprising providing the active area in the central region comprising the source and the gate and a cell field;

wherein the cell field includes a trench, and wherein the source and the gate are positioned in the trench; and

wherein the source is positioned towards a bottom of the trench and the gate is arranged on top of the source.

13. A method of making a semiconductor device comprising:

providing an active area comprising a source and a gate;

depositing a gate metal contact above and forming an electrical contact with the gate; and

,

depositing a source metal contact, bordered by two opposite long sides and two opposite short sides, above and forming an electrical contact with the source and comprising a plurality of metal through contacts positioned adjacent a side of the active area, the plurality of metal through contacts comprising a single metal through contact on each of the two short sides and a plurality of metal through contacts arranged at intervals spaced from one another on each of the two long sides,

wherein the single metal through contact provided on each of the two short sides comprises a long metal through contact extending along the entire short side.