Tiered access to on chip features

• US 9,292,713 B2
• Filed: 03/13/2013
• Issued: 03/22/2016
• Est. Priority Date: 03/13/2013
• Status: Active Grant

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Sandri, Jason G., Ahmed, Monib, Walker, Ian S.
• Primary Examiner(s): Armouche, Hadi
• Assistant Examiner(s): Zarrineh, Shahriar
• Application Number:
  US13/799,553
• Publication Number:
  US 20140283119A1
• Time in Patent Office: 1,105 Days
• Field of Search: 726/28
• US Class Current: 1/1
• CPC Class Codes: G06F 21/10 Protecting distributed programs or content, e.g. vending or licensing of copyrighted material protection in video systems or pay television H04N7/16 ; Digital rights management [DRM]
• CPC Class Codes: G06F 21/76 in application-specific integrated circuits [ASIC] or field-programmable devices, e.g. field-programmable gate arrays [FPGA] or programmable logic devices [PLD]
• CPC Class Codes: G06F 21/85 interconnection devices, e.g. bus-connected or in-line devices
• CPC Class Codes: G06F 2221/034 Test or assess a computer or a system
• CPC Class Codes: H04L 9/32 including means for verifying the identity or authority of a user of the system or for message authentication, e.g. authorization, entity authentication, data integrity or data verification, non-repudiation, key authentication or verification of credentials

Abstract

In accordance with some embodiments, multiple blind debug passwords are provided. Each of a plurality of interested entities may have its own password and each password may unlock a specific set of features offered by an integrated circuit. In some embodiments each entity does not know the other passwords of the other entities. Potentially interested entities include an integrated circuit end customer, the original equipment manufacturer, the entity that provided the features to the integrated circuit and a conditional access provider. All debug features may be controlled solely via access to the debug tiers which are accessed by multiple debug passwords. Lower tier passwords are required in order to access higher tiers. Debug features may be separated into multiple tiers with more intrusive access requiring multiple debug passwords in order to gain access.

Claims

1. An apparatus comprising:

a fuse array;

a controller to limit access to said fuse array, said controller to provide at least a public password-free tier for viewing only and password accessed three tiers with access to different feature sets in each tier, each tier requiring a different password, one of said passwords including more bits than the other password, such that accessing a first tier requires a first password, accessing a second tier requires the first password and a second password and accessing a third tier requires the first and second passwords and a third password;

a multiplexer to receive a two bit user identification code which identifies one of four types of users, each user having a different two bit user identification code; and

a gate to determine whether both the user identification code and the correct password for that user have been received, each of the four users having an assigned combination of a two bit identification code and one or more passwords, such one user can access all three tiers and the other users can access less through all the tiers.

2. The apparatus of claim 1, wherein said at least three password accessed tiers, including a tier for a repair center, a tier for an original equipment manufacturer and a tier for a chip manufacturer.

3. The apparatus of claim 1, said controller to enable use of a master password to access both tiers.

4. The apparatus of claim 1 wherein said apparatus limits access to debug information.

5. The apparatus of claim 1 including an operating system.

6. The apparatus of claim 1 including a battery.

7. The apparatus of claim 1 including firmware and a module to update said firmware.

8. A method comprising:

limiting access to a fuse array;

providing at least a public password-free tier for viewing only and password accessed three tiers with access to different feature sets in each tier, each tier requiring a different password, one of said passwords including more bits than the other password, one of said passwords including more bits than the other password, such that accessing a first tier requires a first password, accessing a second tier requires the first password and a second password and accessing a third tier requires the first and second passwords and a third password;

receiving a two bit user identification code which identifies one of four types of users, each user having a different two bit user identification code; and

determining whether both the user identification code and the correct password for that user have been received, each of the four users having an assigned combination of a two bit identification code and one or more passwords, such one user can access all three tiers and the other users can access less through all the tiers.

9. The method of claim 8 including using at least three tiers and requiring a different password for each tier.

10. The method of claim 8 including enabling use of a master password to access both tiers.

11. The method of claim 8 including limiting access to debug information.

12. The method of claim 9 including allowing access via each password to a particular feature set.

13. The method of claim 9 including requiring one password that is the same for each of said three tiers and, in addition, requiring an additional password for at least one of said higher tiers.

14. The method of claim 9 including providing a public password free tier.

15. One or more non-transitory computer readable media storing instructions executed by a processor to perform a sequence comprising:

limiting access to a fuse array;

providing at least a public password-free tier for viewing only and password accessed three tiers with accesses to different feature sets in each tier, each tier requiring a different password, one of said passwords including more bits than the other password such that accessing a first tier requires a first password, accessing a second tier requires the first password and a second password and accessing a third tier requires the first and second passwords and a third password;

receiving a two bit user identification code which identifies one of four types of users, each user having a different two bit user identification code; and

determining whether both the user identification code and the correct password for that user have been received, each of the four users having an assigned combination of a two bit identification code and one or more passwords, such one user can access all three tiers and the other users can access less through all the tiers.

16. The computer readable media of claim 15, said sequence including using at least three tiers and requiring a different password for each tier.

17. The computer readable media of claim 15, said sequence including enabling use of a master password to access both tiers.

18. The computer readable media of claim 15, said sequence including limiting access to debug information.

19. The computer readable media of claim 16, said sequence including allowing access via each password to a particular feature set.

20. The computer readable media of claim 16, said sequence including requiring one password that is the same for each of said three tiers and, in addition, requiring an additional password for at least one of said higher tiers.

21. The computer readable media of claim 16, said sequence including providing a public password free tier.