Display panel, thin film transistor and method of fabricating the same
First Claim
1. A method of fabricating a thin film transistor, comprising:
- providing a first base;
forming a gate on the first base;
forming a dielectric layer on the first base;
forming a metal-oxide semiconductor channel on the first base, the metal-oxide semiconductor channel comprising a metal-oxide semiconductor layer and a plurality of nano micro structures, the nano micro structures being distributed throughout an entire thickness of the metal-oxide semiconductor layer and separated from one another, wherein carrier concentration of the nano micro structures is greater than carrier concentration of the metal-oxide semiconductor layer, and the nano micro structures are a plurality of nano particles spread in the metal-oxide semiconductor layer; and
forming a source and a drain on the first base, wherein the gate and the metal-oxide semiconductor channel are overlapped, the gate, the source, and the drain are separated by the dielectric layer, and the source and the drain are respectively located on two opposite sides of the metal-oxide semiconductor channel.
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Accused Products
Abstract
A thin film transistor (TFT) including a gate, a dielectric layer, a metal-oxide semiconductor channel, a source, and a drain is provided. The gate and the metal-oxide semiconductor channel are overlapped. The gate, the source, and the drain are separated by the dielectric layer. Besides, the source and the drain are respectively located on two opposite sides of the metal-oxide semiconductor channel. The metal-oxide semiconductor channel includes a metal-oxide semiconductor layer and a plurality of nano micro structures disposed in the metal-oxide semiconductor layer and separated from one another. In another aspect, a display panel including the TFT and a method of fabricating the TFT are also provided.
18 Citations
12 Claims
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1. A method of fabricating a thin film transistor, comprising:
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providing a first base; forming a gate on the first base; forming a dielectric layer on the first base; forming a metal-oxide semiconductor channel on the first base, the metal-oxide semiconductor channel comprising a metal-oxide semiconductor layer and a plurality of nano micro structures, the nano micro structures being distributed throughout an entire thickness of the metal-oxide semiconductor layer and separated from one another, wherein carrier concentration of the nano micro structures is greater than carrier concentration of the metal-oxide semiconductor layer, and the nano micro structures are a plurality of nano particles spread in the metal-oxide semiconductor layer; and forming a source and a drain on the first base, wherein the gate and the metal-oxide semiconductor channel are overlapped, the gate, the source, and the drain are separated by the dielectric layer, and the source and the drain are respectively located on two opposite sides of the metal-oxide semiconductor channel. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A thin film transistor comprising:
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a gate; a dielectric layer; a metal-oxide semiconductor channel comprising a metal-oxide semiconductor layer and a plurality of nano micro structures, the nano micro structures being distributed throughout an entire thickness of the metal-oxide semiconductor layer and separated from one another, wherein carrier concentration of the nano micro structures is greater than carrier concentration of the metal-oxide semiconductor layer, and the nano micro structures are a plurality of nano particles spread in the metal-oxide semiconductor layer, wherein a material of the metal-oxide semiconductor layer comprises aluminum zinc oxide (AZO), indium zinc oxide (IZO), indium zinc tin oxide (IZTO), indium-gallium-zinc oxide (IGZO), indium gallium oxide (IGO), zinc oxide (ZnO), cadmium oxide.germanium dioxide (2CdO.GeO2), or nickel cobalt oxide (NiCo2O4), and a material of the nano micro structures comprises ITO or IZO, and the material of the nano micro structures is different from the material of the metal-oxide semiconductor layer; and a source and a drain, wherein the gate and the metal-oxide semiconductor channel are overlapped, the gate, the source, and the drain are separated by the dielectric layer, and the source and the drain are respectively located on two opposite sides of the metal-oxide semiconductor channel. - View Dependent Claims (10)
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11. A display panel comprising:
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a thin film transistor array substrate comprising; a first base; and a plurality of thin film transistors arranged in arrays on the first base, each of the thin film transistors comprising; a gate; a dielectric layer; a metal-oxide semiconductor channel comprising a metal-oxide semiconductor layer and a plurality of nano micro structures, the nano micro structures being distributed throughout an entire thickness of the metal-oxide semiconductor layer and separated from one another, wherein carrier concentration of the nano micro structures is greater than carrier concentration of the metal-oxide semiconductor layer, and the nano micro structures are a plurality of nano particles spread in the metal-oxide semiconductor layer, wherein a material of the metal-oxide semiconductor layer comprises aluminum zinc oxide (AZO), indium zinc oxide (IZO), indium zinc tin oxide (IZTO), indium-gallium-zinc oxide (IGZO), indium gallium oxide (IGO), zinc oxide (ZnO), cadmium oxide.germanium dioxide (2CdO.GeO2), or nickel cobalt oxide (NiCo2O4), and a material of the nano micro structures comprises ITO or IZO, and the material of the nano micro structures is different from the material of the metal-oxide semiconductor layer; and a source and a drain, wherein the gate and the metal-oxide semiconductor channel are overlapped, the gate, the source, and the drain are separated by the dielectric layer, and the source and the drain are respectively located on two opposite sides of the metal-oxide semiconductor channel; an opposite substrate disposed opposite to the thin film transistor array substrate; and a display medium disposed between the thin film transistor array substrate and the opposite substrate. - View Dependent Claims (12)
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Specification