Methods and systems for chemical mechanical polish and clean
First Claim
Patent Images
1. A method of fabricating a semiconductor device, the method comprising:
- providing a semiconductor structure including a metal gate (MG) layer formed to fill in a trench between two adjacent interlayer dielectric (ILD) regions, the MG layer being formed on the ILD regions;
performing a chemical mechanical polishing (CMP) process using a CMP system to planarize the MG layer and the ILD regions; and
cleaning the planarized MG layer using a O3/DIW solution including ozone gas (O3) dissolved in deionized water (DIW), wherein an O3/DIW generator is coupled to a cleaning unit of the CMP system to supply the O3/DIW solution, wherein the cleaning unit includes a spray nozzle coupled to the O3/DIW generator, and wherein the cleaning the planarized MG layer includes cleaning a surface of the semiconductor structure using the spray nozzle further coupled to a megasonic generator configured to provide an oscillation to the O3/DIW solution to form an O3/DIW fog to be sprayed from the spray nozzle to the surface of the semiconductor structure.
1 Assignment
0 Petitions
Accused Products
Abstract
The present disclosure provides a method of fabricating a semiconductor device. The method includes providing a semiconductor structure including a metal gate (MG) layer formed to fill in a trench between two adjacent interlayer dielectric (ILD) regions; performing a chemical mechanical polishing (CMP) process using a CMP system to planarize the MG layer and the ILD regions; and cleaning the planarized MG layer using a O3/DIW solution including ozone gas (O3) dissolved in deionized water (DIW). The MG layer is formed on the ILD regions.
-
Citations
19 Claims
-
1. A method of fabricating a semiconductor device, the method comprising:
-
providing a semiconductor structure including a metal gate (MG) layer formed to fill in a trench between two adjacent interlayer dielectric (ILD) regions, the MG layer being formed on the ILD regions; performing a chemical mechanical polishing (CMP) process using a CMP system to planarize the MG layer and the ILD regions; and cleaning the planarized MG layer using a O3/DIW solution including ozone gas (O3) dissolved in deionized water (DIW), wherein an O3/DIW generator is coupled to a cleaning unit of the CMP system to supply the O3/DIW solution, wherein the cleaning unit includes a spray nozzle coupled to the O3/DIW generator, and wherein the cleaning the planarized MG layer includes cleaning a surface of the semiconductor structure using the spray nozzle further coupled to a megasonic generator configured to provide an oscillation to the O3/DIW solution to form an O3/DIW fog to be sprayed from the spray nozzle to the surface of the semiconductor structure. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 15, 16)
-
-
12. A method of fabricating a semiconductor device, the method comprising:
-
providing a semiconductor structure including a metal gate (MG) layer formed to fill in a trench between two adjacent interlayer dielectric (ILD) regions; performing a chemical mechanical polishing (CMP) process to planarize a first surface of the MG layer and the ILD regions; buffing the first surface with a buffing pad using a O3/DIW solution that includes ozone gas (O3) dissolved in deionized water (DIW); and after the buffing of the first surface, cleaning the first surface, wherein the cleaning of the first surface includes spraying an oscillating O3/DIW fog onto the first surface. - View Dependent Claims (13, 14, 17, 18, 19)
-
Specification