Semiconductor device with enhanced mobility and method
First Claim
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1. A method of forming a semiconductor device comprising:
- providing a region of semiconductor material having a trench extending from a major surface and having an isolated shield electrode structure in a lower portion of the trench and a gate dielectric layer adjacent sidewalls of the trench;
forming conductive spacers adjacent the gate dielectric layer in the trench, the conductive spacers configured as part of a gate electrode structure;
forming a stress inducing structure within the trench and interposed between the conductive spacers, wherein the stress inducing structure and the conductive spacers comprise different materials; and
thereafter forming a conductive layer adjacent the stress inducing layer and interposed between the conductive spacers, the conductive layer configured as another part of the gate electrode structure.
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Abstract
In one embodiment, a vertical insulated-gate field effect transistor includes a feature embedded within a control electrode. The feature is placed within the control electrode to induce stress within predetermined regions of the transistor.
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Citations
13 Claims
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1. A method of forming a semiconductor device comprising:
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providing a region of semiconductor material having a trench extending from a major surface and having an isolated shield electrode structure in a lower portion of the trench and a gate dielectric layer adjacent sidewalls of the trench; forming conductive spacers adjacent the gate dielectric layer in the trench, the conductive spacers configured as part of a gate electrode structure; forming a stress inducing structure within the trench and interposed between the conductive spacers, wherein the stress inducing structure and the conductive spacers comprise different materials; and thereafter forming a conductive layer adjacent the stress inducing layer and interposed between the conductive spacers, the conductive layer configured as another part of the gate electrode structure. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A method for forming an insulating gate field effect transistor structure having enhanced mobility comprising:
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providing a region of semiconductor material having a first conductivity type, a first major surface, and a second major surface opposing the first major surface, where the region of semiconductor material at the second major surface is configured as a drain region; providing a trench structure within the region of semiconductor material comprising; a shield electrode in a lower portion of a trench, where the shield electrode is separated from the region of semiconductor material by a first dielectric layer; a gate electrode in an upper portion of the trench, where the gate electrode is separated from the region of semiconductor material by a second dielectric layer and separated from the shield electrode by a third dielectric layer; and a first region within the gate electrode and comprising a silicide material, wherein the a first region within the gate electrode and comprising a silicide material, wherein the first region is recessed within the trench structure so that no portion of the first region overlaps onto the first major surface and a portion of the first region is provided between the gate electrode and the shield electrode; providing a body region having a second conductivity type opposite to the first conductivity type in the region of semiconductor material, where the body region and the trench region are adjacent, and where the gate electrode is configured to form a channel region within the body region; and providing a source region of the first conductivity type in the body region, the source region having a first side adjacent to the trench structure and a second side opposite to the first side, wherein the first region is configured to propagate stress within the region of semiconductor material adjacent to the trench structure to provide the enhanced mobility. - View Dependent Claims (10, 11, 12, 13)
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Specification