Low profile sensor package with cooling feature and method of making same

• US 9,461,190 B2
• Filed: 09/22/2014
• Issued: 10/04/2016
• Est. Priority Date: 09/24/2013
• Status: Active Grant

• Current Assignee: Optiz, Inc.
• Original Assignee: Optiz, Inc.
• Inventors: Oganesian, Vage, Lu, Zhenhua
• Primary Examiner(s): HOANG, QUOC DINH
• Application Number:
  US14/492,219
• Publication Number:
  US 20150084148A1
• Time in Patent Office: 743 Days
• Field of Search: 257/432, 257/433, 257/444, 257/706, 257/712, 257/713
• US Class Current: 1/1
• CPC Class Codes: H01L 2224/04042 Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
• CPC Class Codes: H01L 2224/05548 Bonding area integrally formed with a redistribution layer on the semiconductor or solid-state body
• CPC Class Codes: H01L 2224/16225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/32225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/73204 the bump connector being embedded into the layer connector
• CPC Class Codes: H01L 2224/73253 Bump and layer connectors
• CPC Class Codes: H01L 2224/73265 Layer and wire connectors
• CPC Class Codes: H01L 27/14618 Containers
• CPC Class Codes: H01L 27/1462 Coatings
• CPC Class Codes: H01L 27/14632 Wafer-level processed structures
• CPC Class Codes: H01L 27/14634 Assemblies, i.e. Hybrid structures
• CPC Class Codes: H01L 27/14636 Interconnect structures
• CPC Class Codes: H01L 27/14687 Wafer level processing
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/15153 the die mounting substrate comprising a recess for hosting the device
• CPC Class Codes: H01L 31/02005 for device characterised by at least one potential jump barrier or surface barrier
• CPC Class Codes: H01L 31/024 Arrangements for cooling, heating, ventilating or temperature compensation for photovoltaic devices H01L31/052

Abstract

A sensor device and method of making same that includes a silicon substrate with opposing first and second surfaces, a sensor formed at or in the first surface, a plurality of first contact pads formed at the first surface which are electrically coupled to the sensor, and a plurality of cooling channels formed as first trenches extending into the second surface but not reaching the first surface. The cooling channels instead can be formed on one or more separate substrates that are attached to the silicon substrate for cooling the silicon substrate.

Claims

1. A sensor device, comprising:

a silicon substrate with opposing first and second surfaces;

a sensor formed at or in the first surface;

a plurality of first contact pads formed at the first surface which are electrically coupled to the sensor;

a plurality of cooling channels formed as first trenches extending into the second surface but not reaching the first surface;

a second substrate with opposing first and second surfaces, wherein the second surface of the silicon substrate is mounted to the first surface of the second substrate;

a plurality of second contact pads disposed at the first surface of the second substrate;

a plurality of electrical leads extending through the second substrate and electrically coupled to the plurality of second contact pads; and

a plurality of wires each extending from one of the first contact pads to one of the second contact pads.

2. The device of claim 1, further comprising:

a thermally conductive material disposed between the second surface of the silicon substrate and the first surface of the second substrate.

3. The device of claim 1, further comprising:

a plurality of heat conducting pads disposed at the first surface of the second substrate; and

a plurality of heat conducting leads extending through the second substrate and coupled to the plurality of heat conducting pads.

4. The device of claim 1, further comprising:

a portion of the first surface of the second substrate is recessed to define a cavity, wherein the silicon substrate is at least partially disposed in the cavity.

5. The device of claim 4, wherein the plurality of second contact pads is disposed at the recessed portion of the first surface of the second substrate, and wherein the wires are disposed in the cavity.

6. A sensor device, comprising:

a silicon substrate with opposing first and second surfaces;

a sensor formed at or in the first surface;

a plurality of first contact pads formed at the first surface which are electrically coupled to the sensor;

a second substrate with opposing first and second surfaces, wherein the second surface of the silicon substrate is mounted to the first surface of the second substrate by a thermally conductive material continuously disposed between the second surface of the silicon substrate and the first surface of the second substrate; and

a plurality of cooling channels formed as first trenches extending into one of the first and second surfaces of the second substrate but not reaching the other of the first and second surfaces of the second substrate.

7. The device of claim 6, further comprising:

a thermal electric heat pump disposed between the second surface of the silicon substrate and the first surface of the second substrate.

8. The device of claim 6, further comprising:

one or more heat pipes disposed in the cooling channels.

9. A sensor device, comprising:

a silicon substrate with opposing first and second surfaces;

a sensor formed at or in the first surface;

a plurality of first contact pads formed at the first surface which are electrically coupled to the sensor;

a second substrate with opposing first and second surfaces, wherein the second surface of the silicon substrate is mounted to the first surface of the second substrate;

a plurality of cooling channels formed as first trenches extending into one of the first and second surfaces of the second substrate but not reaching the other of the first and second surfaces of the second substrate; and

a second plurality of cooling channels formed as second trenches extending into the other of the first and second surfaces of the second substrate.

10. A sensor device, comprising:

a silicon substrate with opposing first and second surfaces;

a sensor formed at or in the first surface;

a plurality of first contact pads formed at the first surface which are electrically coupled to the sensor;

a second substrate with opposing first and second surfaces, wherein the second surface of the silicon substrate is mounted to the first surface of the second substrate;

a plurality of cooling channels formed as first trenches extending into one of the first and second surfaces of the second substrate but not reaching the other of the first and second surfaces of the second substrate;

a third substrate with opposing first and second surfaces, wherein the second surface of the second substrate is mounted to the first surface of the third substrate; and

a second plurality of cooling channels formed as second trenches extending into one of the first and second surfaces of the third substrate but not reaching the other of the first and second surfaces of the third substrate.

11. A sensor device, comprising:

a silicon substrate with opposing first and second surfaces;

a sensor formed at or in the first surface;

a plurality of first contact pads formed at the first surface which are electrically coupled to the sensor;

a second substrate with opposing first and second surfaces, wherein the second surface of the silicon substrate is mounted to the first surface of the second substrate;

a plurality of cooling channels formed as first trenches extending into one of the first and second surfaces of the second substrate but not reaching the other of the first and second surfaces of the second substrate;

a third substrate with opposing first and second surfaces, wherein the second surface of the second substrate is mounted to the first surface of the third substrate;

a plurality of second contact pads disposed at the first surface of the third substrate;

a plurality of electrical leads extending through the third substrate and electrically coupled to the plurality of second contact pads; and

a plurality of wires each extending from one of the first contact pads to one of the second contact pads.

12. The device of claim 11, further comprising:

a portion of the first surface of the third substrate is recessed to define a cavity, wherein the silicon substrate is at least partially disposed in the cavity.