Dual-port semiconductor memory and first in first out (FIFO) memory having electrically floating body transistor
First Claim
Patent Images
1. A semiconductor memory cell comprising:
- a plurality of bipolar devices; and
a common base region of a first conductivity type configured to store a charge that is indicative of a memory state of said semiconductor memory cell;
wherein adjacent ones of each of said bipolar devices are separated by a conductive region having a second conductivity type;
wherein said common base region is shared among said plurality of bipolar devices; and
wherein one of said plurality of bipolar devices is configured to maintain the charge stored in said common base region.
1 Assignment
0 Petitions
Accused Products
Abstract
Multi-port semiconductor memory cells including a common floating body region configured to be charged to a level indicative of a memory state of the memory cell. The multi-port semiconductor memory cells include a plurality of gates and conductive regions interfacing with said floating body region. Arrays of memory cells and method of operating said memory arrays are disclosed for making a memory device.
-
Citations
5 Claims
-
1. A semiconductor memory cell comprising:
-
a plurality of bipolar devices; and a common base region of a first conductivity type configured to store a charge that is indicative of a memory state of said semiconductor memory cell; wherein adjacent ones of each of said bipolar devices are separated by a conductive region having a second conductivity type; wherein said common base region is shared among said plurality of bipolar devices; and wherein one of said plurality of bipolar devices is configured to maintain the charge stored in said common base region. - View Dependent Claims (2, 3, 4, 5)
-
Specification