Semiconductor device and method for producing same having multilayer wiring structure with contact hole having hydrophobic film formed on side surface of the contact hole

• US 9,966,463 B2
• Filed: 04/13/2017
• Issued: 05/08/2018
• Est. Priority Date: 10/31/2013
• Status: Active Grant

• Current Assignee: Fujitsu Limited
• Original Assignee: Fujitsu Limited
• Inventors: Ozaki, Shirou, Okamoto, Naoya
• Primary Examiner(s): Smoot, Stephen W
• Assistant Examiner(s): Booker, Vicki B
• Application Number:
  US15/486,748
• Publication Number:
  US 20170222033A1
• Time in Patent Office: 390 Days
• CPC Class Codes: H01L 21/02063 the processing being the formation of vias or contact holes
• CPC Class Codes: H01L 21/02123 the material containing silicon
• CPC Class Codes: H01L 21/02167 the material being a silicon carbide not containing oxygen, e.g. SiC, SiC:H or silicon carbonitrides H01L21/02126 and H01L21/0214 take precedence
• CPC Class Codes: H01L 21/0217 the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz H01L21/02126 and H01L21/0214 take precedence
• CPC Class Codes: H01L 21/02216 the compound being a molecule comprising at least one silicon-oxygen bond and the compound having hydrogen or an organic group attached to the silicon or oxygen, e.g. a siloxane
• CPC Class Codes: H01L 21/02219 the compound comprising silicon and nitrogen
• CPC Class Codes: H01L 21/02282 liquid deposition, e.g. spin-coating, sol-gel techniques, spray coating
• CPC Class Codes: H01L 21/02312 treatment by exposure to a gas or vapour
• CPC Class Codes: H01L 21/02348 treatment by exposure to UV light
• CPC Class Codes: H01L 21/3105 After-treatment
• CPC Class Codes: H01L 21/31116 by dry-etching
• CPC Class Codes: H01L 21/76802 by forming openings in dielectrics
• CPC Class Codes: H01L 21/76814 post-treatment or after-treatment, e.g. cleaning or removal of oxides on underlying conductors
• CPC Class Codes: H01L 21/76825 by exposing the layer to particle radiation, e.g. ion implantation, irradiation with UV light or electrons etc. plasma treatment H01L21/76826
• CPC Class Codes: H01L 21/76826 by contacting the layer with gases, liquids or plasmas
• CPC Class Codes: H01L 21/76832 Multiple layers
• CPC Class Codes: H01L 21/76877 Filling of holes, grooves or trenches, e.g. vias, with conductive material
• CPC Class Codes: H01L 21/78 with subsequent division of the substrate into plural individual devices cutting to change the surface-physical characteristics or shape of semiconductor bodies H01L21/304
• CPC Class Codes: H01L 23/296 Organo-silicon compounds
• CPC Class Codes: H01L 23/3157 Partial encapsulation or coating mask layer used as insulation layer H01L21/31
• CPC Class Codes: H01L 23/3192 : Multilayer coating
• CPC Class Codes: H01L 27/0629 : in combination with diodes, or resistors, or capacitors
• CPC Class Codes: H01L 29/2003 : Nitride compounds
• CPC Class Codes: H01L 29/205 : in different semiconductor regions , e.g. heterojunctions
• CPC Class Codes: H01L 29/66462 : with a heterojunction interface channel or gate, e.g. HFET, HIGFET, SISFET, HJFET, HEMT
• CPC Class Codes: H01L 29/7786 : with direct single heterostructure, i.e. with wide bandgap layer formed on top of active layer, e.g. direct single heterostructure MIS-like HEMT
• CPC Class Codes: H01L 29/7787 : with wide bandgap charge-carrier supplying layer, e.g. direct single heterostructure MODFET
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 : Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

A method of producing a semiconductor device includes forming an insulating film on a substrate on which a semiconductor layer is formed; removing a part of the insulating film by etching to form an opening in the insulating film; supplying steam with a temperature greater than or equal to 200° C. and less than or equal to 600° C. to the opening formed in the insulating film; after supplying the steam, applying a solution including a silicon compound to a side surface of the insulating film defining the opening; and forming a hydrophobic film on the side surface of the insulating film defining the opening by polymerizing the silicon compound.

Claims

1. A method of producing a semiconductor device, the method comprising:

forming an insulating film on a substrate on which a semiconductor layer is formed;

removing a part of the insulating film by etching to form an opening in the insulating film;

supplying steam with a temperature greater than or equal to 200°

C. and less than or equal to 600°

C. to the opening formed in the insulating film;

after supplying the steam, applying a solution including a silicon compound to a side surface of the insulating film defining the opening; and

forming a hydrophobic film on the side surface of the insulating film defining the opening by polymerizing the silicon compound.

2. The method as claimed in claim 1, further comprising:

filling the opening with a metal material to form a through electrode; and

repeating the forming the insulating film, the removing, the supplying, the applying, the forming the hydrophobic film, and the filling to form a multilayer wiring structure.

3. The method as claimed in claim 1, wherein the opening implements a scribe line.

4. The method as claimed in claim 1, wherein the hydrophobic film is a polymerized film formed by illuminating the silicon compound with ultraviolet rays.

5. The method as claimed in claim 1, wherein the silicon compound is indicated by a structural formula below, where each of R¹ and R² is one of a hydrogen atom, a substituted or unsubstituted alkyl group, a substituted or unsubstituted alkenyl group, a substituted or unsubstituted cycloalkyl group, and a substituted or unsubstituted aryl group;

and “

n”

is an integer greater than or equal to 2;

6. The method as claimed in claim 1, wherein the silicon compound is indicated by a structural formula below, where one or two of R¹, R², and R³ are hydrogen atoms;

each of the rest of R¹, R², and R³ is one of a hydrogen atom, a substituted or unsubstituted alkyl group, a substituted or unsubstituted alkenyl group, a substituted or unsubstituted cycloalkyl group, and a substituted or unsubstituted aryl group; and

“

n”

is an integer greater than or equal to 2;

7. The method as claimed in claim 1, wherein the insulating film includes porous silica that is forming by applying a solution including silica to the substrate and drying the applied solution.

8. The method as claimed in claim 1, wherein the etching is dry etching.

9. The method as claimed in claim 1, wherein the semiconductor layer includes a nitride semiconductor.

10. The method as claimed in claim 1, wherein

the semiconductor layer is formed by stacking a first semiconductor layer and a second semiconductor layer on the substrate in this order;

the first semiconductor layer is made of a material including GaN; and

the second semiconductor layer is made of a material including AlGaN.