System and method for multichannel cryptographic processing

• US 10,103,876 B2
• Filed: 10/17/2013
• Issued: 10/16/2018
• Est. Priority Date: 10/17/2012
• Status: Active Grant

• Current Assignee: Synopsys Incorporated
• Original Assignee: Synopsys Incorporated
• Inventors: Hamilton, Neil, Bourdon, Francois, Borza, Michael
• Primary Examiner(s): Gergiso, Techane
• Application Number:
  US14/056,355
• Publication Number:
  US 20140192975A1
• Time in Patent Office: 1,825 Days
• CPC Class Codes: G06F 21/72 in cryptographic circuits
• CPC Class Codes: G06F 21/755 with measures against power attack
• CPC Class Codes: G06F 2221/2123 Dummy operation
• CPC Class Codes: H04L 9/003 for power analysis, e.g. differential power analysis [DPA] or simple power analysis [SPA]

Abstract

A processor is disclosed for ciphering of first data. The processor includes a key store and a first data store. In use the processor for ciphering the first data in accordance with a first cipher process and a first secret key to provide output data, during ciphering of the first data inserting within the cipher processor other data for ciphering in accordance with at least a portion of the first cipher process, the other data inserted within a sequence of cipher processor operations and scheduled for obfuscating the output data.

Claims

1. A cipher processing system, comprising:

a key store for storing a first secret key;

a first data store for receiving and storing at least a portion of first stream of data and a portion of at least a second stream of data; and

a cipher processor for ciphering the first stream of data and the second stream of data in accordance with a first cipher process and the first secret key to provide output data, during ciphering of the first data interleaving processing of rounds for the first data within the cipher processor with processing of rounds for at least the second stream of data for ciphering in accordance with at least a portion of the first cipher process, at least the second stream of data for being ciphered within a sequence of the first cipher processor operations and scheduled for obfuscating the output data.

2. A cipher processing system according to claim 1 wherein the other data is dummy data.

3. A cipher processing system according to claim 2 wherein the other data are inserted at one or more locations within the sequence of cipher processor operations to obfuscate operation of the cipher processor from side-channel attack.

4. A cipher processing system according to claim 1 wherein the other data are inserted to make it difficult to determine by way of side-channel attack when initial and final rounds occur.

5. A cipher processing system according to claim 1 wherein the other data is disposed within a sequence of the first data differently for different first data to make it difficult to determine by way of side-channel attack when within the sequence of cipher processor operations the first data are being inserted.

6. A cipher processing system according to claim 1, wherein the other data is another simultaneous stream of data.