Stacked nanosheet field-effect transistor with air gap spacers
First Claim
1. A structure for a field-effect transistor, the structure comprising:
- a fin including a first nanosheet channel layer and a second nanosheet channel layer arranged in a vertical stack;
a gate structure including a section located in a space between the first nanosheet channel layer and the second nanosheet channel layer;
a source/drain region connected with a portion of the first nanosheet channel layer and a portion of the second nanosheet channel layer; and
an air gap spacer including a cavity surrounded by the portion of the first nanosheet channel layer, the portion of the second nanosheet channel layer, the section of the gate structure, and the source/drain region, and the source/drain region is arranged to close and seal the cavity.
3 Assignments
0 Petitions
Accused Products
Abstract
Structures for a nanosheet field-effect transistor and methods for forming a structure for a nanosheet field-effect transistor. A fin is formed that includes a first nanosheet channel layer and a second nanosheet channel layer arranged in a vertical stack. A cavity is formed between a portion of the first nanosheet channel layer and a portion of the second nanosheet channel layer. An epitaxially-grown source/drain region is connected with the portion of the first nanosheet channel layer and the portion of the second nanosheet channel layer. A gate structure is formed that includes a section located in a space between the first nanosheet channel layer and the second nanosheet channel layer. The cavity is surrounded by the first nanosheet channel layer, the second nanosheet channel layer, the section of the gate structure, and the source/drain region to define an air gap spacer.
112 Citations
20 Claims
-
1. A structure for a field-effect transistor, the structure comprising:
-
a fin including a first nanosheet channel layer and a second nanosheet channel layer arranged in a vertical stack; a gate structure including a section located in a space between the first nanosheet channel layer and the second nanosheet channel layer; a source/drain region connected with a portion of the first nanosheet channel layer and a portion of the second nanosheet channel layer; and an air gap spacer including a cavity surrounded by the portion of the first nanosheet channel layer, the portion of the second nanosheet channel layer, the section of the gate structure, and the source/drain region, and the source/drain region is arranged to close and seal the cavity. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
-
-
10. A method for forming a field-effect transistor, the method comprising:
-
forming a first fin that includes a first nanosheet channel layer and a second nanosheet channel layer arranged in a vertical stack; forming a cavity between a portion of the first nanosheet channel layer and a portion of the second nanosheet channel layer; epitaxially growing a source/drain region connected with the portion of the first nanosheet channel layer and the portion of the second nanosheet channel layer; and forming a first gate structure including a section located in a space between the first nanosheet channel layer and the second nanosheet channel layer, wherein the cavity is surrounded by the portion of the first nanosheet channel layer, the portion of the second nanosheet channel layer, the section of the first gate structure, and the source/drain region to define an air gap spacer, and the source/drain region is arranged to close and seal the cavity. - View Dependent Claims (11, 12, 13, 14, 15, 16, 17, 18, 19)
-
-
20. A structure for a field-effect transistor, the structure comprising:
-
a fin including a first nanosheet channel layer and a second nanosheet channel layer arranged in a vertical stack; a gate structure including a section located in a space between the first nanosheet channel layer and the second nanosheet channel layer; a source/drain region connected with a portion of the first nanosheet channel layer and a portion of the second nanosheet channel layer; an air gap spacer surrounded by the portion of the first nanosheet channel layer, the portion of the second nanosheet channel layer, the section of the gate structure, and the source/drain region; and a conformal dielectric layer includes a first portion arranged between the air gap spacer and the section of the gate structure, wherein the fin is located on a substrate, the substrate includes a dielectric layer adjacent to the fin, the conformal dielectric layer has a portion located on the dielectric layer, the fin and the portion of the conformal dielectric layer mask a first area on the dielectric layer, the dielectric layer including a second area adjacent to the first area, and the dielectric layer is thinner in the second area than in the first area.
-
Specification