Manifolded gate resistance network

• US 10,541,682 B2
• Filed: 11/08/2017
• Issued: 01/21/2020
• Est. Priority Date: 11/10/2016
• Status: Active Grant

• Current Assignee: Skyworks Solutions Incorporated
• Original Assignee: Skyworks Solutions Incorporated
• Inventors: Popplewell, Peter Harris Robert, Roy, Ambarish, Blin, Guillaume Alexandre
• Primary Examiner(s): Deberadinis, Robert L
• Application Number:
  US15/806,513
• Publication Number:
  US 20180131369A1
• Time in Patent Office: 804 Days
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 23/66 High-frequency adaptations
• CPC Class Codes: H01L 27/0274 involving a parasitic bipolar transistor triggered by the electrical biasing of the gate electrode of the field effect transistor, e.g. gate coupled transistors
• CPC Class Codes: H01L 27/1203 the substrate comprising an insulating body on a semiconductor body, e.g. SOI three-dimensional layout H01L27/0688
• CPC Class Codes: H01L 29/78603 characterised by the insulating substrate or support H01L29/78657 takes precedence
• CPC Class Codes: H01L 29/78639 with a drain or source connected to a bulk conducting substrate
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/15192 Resurf arrangement of the internal vias
• CPC Class Codes: H01L 2924/15313 being a land array, e.g. LGA
• CPC Class Codes: H01L 2924/19105 in a side-by-side arrangement on a common die mounting substrate
• CPC Class Codes: H03K 17/102 in field-effect transistor switches
• CPC Class Codes: H03K 17/687 the devices being field-effect transistors
• CPC Class Codes: H03K 17/693 Switching arrangements with several input- or output-terminals, e.g. multiplexers, distributors logic circuits H03K19/00; code converters H03M5/00, H03M7/00
• CPC Class Codes: H03K 2217/0018 Special modifications or use of the back gate voltage of a FET

Abstract

A radio-frequency switch includes a pole node, a throw node connected to the pole node via a radio-frequency signal path, the radio-frequency signal path including first, second, third and fourth field-effect transistors connected in series, each of the first, second, third and fourth field-effect transistors having a gate, a first coupling path coupling the gate of the first field-effect transistor to the gate of the second field-effect transistor, a second coupling path coupling the gate of the third field-effect transistor to the gate of the fourth field-effect transistor, and a third coupling path coupling the first coupling path to the second coupling path.

Claims

1. A radio-frequency switch comprising:

a pole node;

a throw node connected to the pole node via a radio-frequency signal path coupled between the pole node and the throw node, the radio-frequency signal path including first, second, third and fourth field-effect transistors connected in series between the pole node and the throw node, each of the first, second, third and fourth field-effect transistors having a gate;

a first coupling path coupling the gate of the first field-effect transistor to the gate of the second field-effect transistor;

a second coupling path coupling the gate of the third field-effect transistor to the gate of the fourth field-effect transistor; and

a third coupling path coupling the first coupling path to the second coupling path.

2. The radio-frequency switch of claim 1 further comprising first, second, third and fourth resistors coupled to the gates of the first, second, third and fourth field-effect transistors, respectively.

3. The radio-frequency switch of claim 2 wherein the third coupling path is coupled to the first coupling path between the first and second resistors and coupled to the second coupling path between the third and fourth resistors.

4. The radio-frequency switch of claim 1 further comprising a gate control input node coupled to the third coupling path.

5. The radio-frequency switch of claim 4 wherein the third coupling path includes fifth and sixth resistors, the gate control input node being coupled to the third coupling path between the fifth and sixth resistors.

6. The radio-frequency switch of claim 1 wherein the radio-frequency signal path further includes fifth, sixth, seventh and eighth field-effect transistors connected in series with the first, second, third and fourth field-effect transistors, each of the fifth, sixth, seventh and eighth field-effect transistors having a gate.

7. The radio-frequency switch of claim 6 further comprising a fourth coupling path coupling the gate of the fifth field-effect transistor to the gate of the sixth field-effect transistor, a fifth coupling path coupling the gate of the seventh field-effect transistor to the gate of the eighth field-effect transistor, and a sixth coupling path coupling the fourth coupling path to the fifth coupling path.

8. The radio-frequency switch of claim 7 further comprising a seventh coupling path coupling the third coupling path to the sixth coupling path.

9. A radio-frequency switch comprising:

a pole node;

a throw node connected to the pole node via a radio-frequency signal path coupled between the pole node and the throw node;

a shunt arm connected between the radio-frequency signal path and a ground reference, the shunt arm including first, second, third and fourth field-effect transistors connected in series between the radio-frequency signal path and the ground reference, each of the first, second, third and fourth field-effect transistors having a gate node;

a first coupling path coupling the gate of the first field-effect transistor to the gate of the second field-effect transistor;

a second coupling path coupling the gate of the third field-effect transistor to the gate of the fourth field-effect transistor; and

a third coupling path coupling the first coupling path to the second coupling path.

10. The radio-frequency switch of claim 9 further comprising first, second, third and fourth resistors coupled to the gates of the first, second, third and fourth field-effect transistors, respectively.

11. The radio-frequency switch of claim 10 wherein the third coupling path is coupled to the first coupling path between the first and second resistors and coupled to the second coupling path between the third and fourth resistors.

12. The radio-frequency switch of claim 9 further comprising a gate control input node coupled to the third coupling path.

13. The radio-frequency switch of claim 12 further wherein the third coupling path includes fifth and sixth resistors, the gate control input node being coupled to the third coupling path between the fifth and sixth resistors.

14. The radio-frequency switch of claim 9 wherein the radio-frequency signal path further includes fifth, sixth, seventh and eighth field-effect transistors connected in series with the first, second, third and fourth field-effect transistors, each of the fifth, sixth, seventh and eighth field-effect transistors having a gate.

15. The radio-frequency switch of claim 14 further comprising a fourth coupling path coupling the gate of the fifth field-effect transistor to the gate of the sixth field-effect transistor, a fifth coupling path coupling the gate of the seventh field-effect transistor to the gate of the eighth field-effect transistor, and a sixth coupling path coupling the fourth coupling path to the fifth coupling path.

16. The radio-frequency switch of claim 15 further comprising a seventh coupling path coupling the third coupling path to the sixth coupling path.

17. A radio-frequency switch comprising:

a pole node connected to a first throw node via a first radio-frequency signal path, the first radio-frequency signal path including a first plurality of field-effect transistors connected in series between the pole node and the first throw node;

a second throw node connected to the pole node via a second radio-frequency signal path, the second radio-frequency signal path including a second plurality of field-effect transistors connected in series between the pole node and the second throw node;

a first shunt arm connected to the first radio-frequency signal path at a first shunt node, the first shunt arm including a third plurality of field-effect transistors connected in series between the first radio-frequency signal path and a ground reference;

a second shunt arm connected to the second radio-frequency signal path including a fourth plurality of field-effect transistors connected in series between the second radio-frequency signal path and the ground reference; and

a first manifolded gate resistance network connected to either the first plurality of field-effect transistors or the second plurality of field-effect transistors.

18. The radio-frequency switch of claim 17 wherein the first manifolded gate resistance network has at least three levels of gate resistances.

19. The radio-frequency switch of claim 17 wherein the first manifolded gate resistance network has at least four levels of gate resistances.

20. The radio-frequency switch of claim 17 further comprising a second manifolded gate resistance network connected to either the third plurality of field-effect transistors of the fourth plurality of field-effect transistors.