Input circuit for tuner and semiconductor device

• US 20030073421A1
• Filed: 10/10/2002
• Published: 04/17/2003
• Est. Priority Date: 10/12/2001
• Status: Abandoned Application

• Current Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Original Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Inventors: Ichimura, Kazuya
• Application Number:
  US10/267,694
• Publication Number:
  US 20030073421A1
• Time in Patent Office: Days
• US Class Current: 455/313
• CPC Class Codes: H03D 7/161 all the frequency changers being connected in cascade
• CPC Class Codes: H04B 1/28 the receiver comprising at least one semiconductor device having three or more electrodes

Abstract

An input circuit for a tuner having a first input terminal to receive a first radio frequency signal and a second input terminal to receive a second radio frequency signal, the input circuit including a converter and a rear circuit configured to process a first intermediate frequency signal. The converter includes a first local oscillator configured to generate a first local signal serving when converting the first and second radio frequency signals into a first intermediate frequency signal and a first mixer configured to mix the first local signal with the first and second radio frequency signals and to generate the first intermediate frequency signal.

Claims

1. An input circuit for a tuner having a first input terminal to receive a first radio frequency signal and a second input terminal to receive a second radio frequency signal, the input circuit comprising:

a converter comprising;

a first local oscillator configured to generate a first local signal serving when converting the first and second radio frequency signals into a first intermediate frequency signal; and

a first mixer configured to mix the first local signal with the first and second radio frequency signals and to generate the first intermediate frequency signal; and

a rear circuit configured to process the first intermediate frequency signal.

2. The input circuit of claim 1, wherein said rear circuit comprises:

an oscillator configured to generate an oscillating signal serving when detecting the first intermediate frequency signal; and

a detector configured to mix the oscillating signal with the first intermediate frequency signal and to detect the first intermediate frequency signal.

3. The input circuit of claim 1, wherein said rear circuit comprises:

a second local oscillator configured to generate a second local signal serving when converting the first intermediate frequency signal into a second intermediate frequency signal; and

a second mixer configured to mix the second local signal with the first intermediate frequency signal and to generate the second intermediate frequency signal.

4. The input circuit of claim 1, further comprising a phase locked loop circuit configured to control a frequency of the first local signal.

5. The input circuit of claim 1, further comprising a band pass filter configured to pass a fixed frequency band.

6. An input circuit for a tuner having a first input terminal to receive a radio frequency signal and a second input terminal AC-grounded outside a semiconductor chip, the input circuit comprising:

a converter comprising;

a first local oscillator configured to generate a first local signal serving when converting the radio frequency signal into a first intermediate frequency signal; and

a first mixer configured to mix the first local signal with the radio frequency signal and to generate the first intermediate frequency signal; and

a rear circuit configured to process the first intermediate frequency signal.

7. The input circuit of claim 6, wherein said rear circuit comprises:

an oscillator configured to generate an oscillating signal serving when detecting the first intermediate frequency signal; and

a detector configured to mix the oscillating signal with the first intermediate frequency signal and to detect the first intermediate frequency signal.

8. The input circuit of claim 6, wherein said rear circuit comprises:

a second local oscillator configured to generate a second local signal serving when converting the first intermediate frequency signal into a second intermediate frequency signal; and

a second mixer configured to mix the second local signal with the first intermediate frequency signal and to generate the second intermediate frequency signal.

9. The input circuit of claim 6, further comprising a phase locked loop circuit configured to control a frequency of the first local signal.

10. The input circuit of claim 6, further comprising a band pass filter configured to pass a fixed frequency band.

11. A semiconductor device having a first input terminal to receive a first radio frequency signal and a second input terminal to receive a second radio frequency signal, the semiconductor device comprising:

a semiconductor chip;

a converter configured to be arranged on said semiconductor chip, comprising;

a first local oscillator configured to generate a first local signal serving when converting the first and second radio frequency signals into a first intermediate frequency signal; and

a first mixer configured to mix the first local signal with the first and second radio frequency signals and to generate the first intermediate frequency signal; and

a rear circuit configured to be arranged on said semiconductor chip, to process the first intermediate frequency signal.

12. The semiconductor device of claim 11, wherein said rear circuit comprises:

an oscillator configured to generate a oscillating signal serving when detecting the first intermediate frequency signal; and

a detector configured to mix the oscillating signal with the first intermediate frequency signal and to detect the first intermediate frequency signal.

13. The semiconductor device of claim 11, wherein said rear circuit comprises:

a second local oscillator configured to generate a second local signal serving when converting the first intermediate frequency signal into a second intermediate frequency signal; and

a second mixer configured to mix the second local signal with the first intermediate frequency signal and to generate the second intermediate frequency signal.

14. The semiconductor device of claim 11, further comprising a phase locked loop circuit configured to control a frequency of the first local signal.

15. The semiconductor device of claim 11, further comprising a band pass filter configured to pass a fixed frequency band.

16. A semiconductor device having a first input terminal to receive a radio frequency signal and a second input terminal AC-grounded outside a semiconductor chip comprising:

said semiconductor chip;

a converter configured to be arranged on said semiconductor chip, comprising;

a first local oscillator configured to generate a first local signal serving when converting the radio frequency signal into a first intermediate frequency signal; and

a first mixer configured to mix the first local signal with the radio frequency signal and to generate the first intermediate frequency signal; and

a rear circuit configured to be arranged on said semiconductor chip, to process the first intermediate frequency signal.

17. The semiconductor device of claim 16, wherein said rear circuit comprises:

an oscillator configured to generate an oscillating signal serving when detecting the first intermediate frequency signal; and

a detector configured to mix the oscillating signal with the first intermediate frequency signal and to detect the first intermediate frequency signal.

18. The semiconductor device of claim 16, wherein said rear circuit comprises:

a second local oscillator configured to generate a second local signal serving when converting the first intermediate frequency signal into a second intermediate frequency signal; and

a second mixer configured to mix the second local signal with the first intermediate frequency signal and to generate the second intermediate frequency signal.

19. The semiconductor device of claim 16, further comprising a phase locked loop circuit configured to control a frequency of the first local signal.

20. The semiconductor device of claim 16, further comprising a band pass filter configured to pass a fixed frequency band.