Active-pixel image sensors

• US 20040027470A1
• Filed: 04/04/2003
• Published: 02/12/2004
• Est. Priority Date: 04/05/2002
• Status: Active Grant

• Current Assignee: STMicroelectronics Limited (STMicroelectronics NV)
• Original Assignee: STMicroelectronics Limited (STMicroelectronics NV)
• Inventors: Henderson, Robert, Hurwitz, Jonathan Ephriam David
• Granted Patent: US 7,253,837 B2
• Time in Patent Office: Days
• US Class Current: 348/294
• CPC Class Codes: H04N 25/616 involving a correlated sampling function, e.g. correlated double sampling [CDS] or triple sampling
• CPC Class Codes: H04N 25/672 between adjacent sensors or output registers for reading a single image

Abstract

An image sensor has an array of pixels read by column circuits to provide reset and read samples on a pair of sample capacitors. To alleviate the effects of parasitic capacitance in the region of the sample capacitors, a modified timing arrangement is used. Both sample switches are operated simultaneously to pre-charge both sample capacitors with a pixel signal value. One sample switch is operated after reset to apply a reset value to one of the pre-charged sample capacitors.

Claims

1. A method of operating an image sensor, which image sensor comprises an array of active pixel elements, each column of pixels having an output circuit which comprises a pair of sample capacitors and switching means operable in conjunction with pixel switches to apply pixel voltages to said sample capacitors;

the method comprising;

(a) operating said switching means to apply a first pixel value to both sample capacitors;

(b) changing the state of the pixel;

(c) operating the switching means to apply a second pixel value to one of the capacitors; and

(d) utilizing the difference of the resulting voltages on the capacitors as the image value for the pixel.

2. The method of claim 1, in which the first pixel value is a readout value, the second pixel value is a reset value, and the change of state of the pixel comprises applying a reset voltage.

3. The method of claim 2, in which the pixels are three-transistor pixels.

4. The method of claim 1, in which the first pixel value is a reset value, the second pixel value is a readout value, and the change of state of the pixel comprises applying a transfer gate voltage to the pixel.

5. The method of claim 4, in which the pixels are pinned-photodiode pixels.

6. The method of any preceding claim, in which step (a) is performed at the end of a time interval from release of the pixel from a preceding reset, the time interval being selected to define a desired exposure period.

7. An image sensor comprising an array of active pixel elements, each column of pixels having an output circuit which comprises a pair of sample capacitors and a respective pair of switches connecting the sample capacitors to a column output line;

the image sensor further comprising timing means arranged to operate said switches in unison to apply a first pixel value to both sample capacitors, to apply a voltage which changes the state of the pixel, and to operate one switch to apply a second pixel value to one of the sample capacitors.

8. An image sensor according to claim 7, the image sensor being a solid state CMOS device.

9. An image sensor according to claim 7 or claim 8, in which each pixel is a three transistor pixel, and in which the first pixel value is a readout value, said applied voltage is a rest voltage, and the second pixel value is a reset value.

10. An image sensor according to claim 7 or claim 8, in which each pixel is a four transistor pinned photodiode pixel having a transfer gate, and in which the first pixel value is a reset value, said applied voltage is a transfer voltage applied to the transfer gate, and the second pixel value is a readout value.