Semiconductor device and method of making same

• US 20040087055A1
• Filed: 10/27/2003
• Published: 05/06/2004
• Est. Priority Date: 05/09/2001
• Status: Abandoned Application

• Current Assignee: NSC Nanosemiconductor GmbH
• Original Assignee: NSC Nanosemiconductor GmbH
• Inventors: Ledentsov, Nikolai
• Application Number:
  US10/694,687
• Publication Number:
  US 20040087055A1
• Time in Patent Office: Days
• US Class Current: 438/77
• CPC Class Codes: B82Y 10/00 Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
• CPC Class Codes: B82Y 20/00 Nanooptics, e.g. quantum optics or photonic crystals
• CPC Class Codes: C30B 25/18 characterised by the substrate
• CPC Class Codes: H01L 21/0237 Materials
• CPC Class Codes: H01L 21/02395 Arsenides
• CPC Class Codes: H01L 21/02439 Materials
• CPC Class Codes: H01L 21/02463 Arsenides
• CPC Class Codes: H01L 21/02507 Alternating layers, e.g. superlattice
• CPC Class Codes: H01L 21/02521 Materials
• CPC Class Codes: H01L 21/02546 Arsenides
• CPC Class Codes: H01L 21/3245 of AIIIBV compounds
• CPC Class Codes: H01L 33/0062 for devices with an active region comprising only III-V compounds
• CPC Class Codes: H01S 2301/173 The laser chip comprising special buffer layers, e.g. dislocation prevention or reduction
• CPC Class Codes: H01S 2304/12 Pendeo epitaxial lateral overgrowth [ELOG], e.g. for growing GaN based blue laser diodes
• CPC Class Codes: H01S 5/22 having a ridge or stripe structure
• CPC Class Codes: H01S 5/3201 incorporating bulkstrain effects, e.g. strain compensation, strain related to polarisation
• CPC Class Codes: Y10S 438/902 Capping layer
• CPC Class Codes: Y10S 438/962 Quantum dots and lines

Abstract

The method produces coherent dislocation-free regions from initially dislocated and/or defect-rich lattice mismatched layer grown on top of the substrate having a different lattice constant, which does not contain any processing steps before of after the lattice-mismatched layer growth. The process preferably uses in situ formation of a cap layer on top of a dislocated layer. The cap layer preferably has a lattice parameter close to that in the underlying substrate, and different from that in the lattice mismatched layer in no strain state. Under these conditions, the cap layer undergoes elastic repulsion from the regions in the vicinity of the dislocations, where the lattice parameter is the most different from that in the substrate. The cap layer is absent in these regions. When the cap layer has a lower thermal evaporation rate than the underlying lattice-mismatched layer, the regions of this lattice-mismatched layer containing dislocations are selectively evaporated at high enough temperatures, and only the coherent defect-free regions of the initially defect-rich lattice-mismatched layer remain on the substrate. In one embodiment of the invention, the defect-free regions are formed on the substrate with a size preferably tuned in the range of 30-1000 nm, depending on the annealing conditions, thickness of the cap layer, and the lattice mismatch. A device created by this method is also disclosed.

Claims

1. A semiconductor device deposited on a surface suitable for epitaxial growth having a first lattice constant and a first thermal evaporation rate manufactured by a method comprising the steps of:

a) depositing a lattice-mismatched layer, having a second lattice constant in no-strain state, which is different of the lattice constant of the surface, wherein the lattice-mismatched layer has a second thermal evaporation rate, wherein the lattice-mismatched layer is deposited until at least one dislocation in the lattice-mismatched layer is created and a desired thickness is reached;

b) depositing a cap layer, having a third lattice constant and a third thermal evaporation rate wherein the third thermal evaporation rate is lower than the second evaporation rate, such that the cap layer nucleates selectively on at least one region of the lattice-mismatched layer such that the at least one dislocation is not covered by the cap layer; and

c) annealing the device at a temperature and duration, such that the at least one dislocation is eliminated by local evaporation of the nearby region of the lattice-mismatched layer.

2. The semiconductor device of claim 1, wherein the method of manufacture further comprises the step of, prior to step (a), depositing an epilayer on the surface.

3. The semiconductor device of claim 2, wherein the method of manufacture further comprises the step of, after step (c), overgrowing an additional layer of the epilayer on the device.

4. The semiconductor device of claim 1, wherein the at least one dislocation is selected from the group consisting of:

a) at least one dislocation network;

b) at least one local dislocation;

c) at least one local defect dipole; and

d) at least one dislocated three-dimensional cluster.

5. The semiconductor device of claim 1, wherein the difference between the lattice constant of the cap layer in no-strain state and the surface is smaller or of opposite sign than the difference between the lattice constant of the lattice-mismatched layer and the surface.

6. The semiconductor device of claim 1, wherein step (a) is performed using a growth technique selected from the group consisting of:

a) molecular beam epitaxy deposition; and

b) metal-organic chemical vapor deposition.

7. The semiconductor device of claim 1, wherein steps (a) and (b) are repeated two times to twenty times.

8. The semiconductor device of claim 1, wherein steps (b) and (c) are repeated two to forty times.

9. The semiconductor device of claim 1, wherein steps (a) through (c) are repeated two to forty times.

10. The semiconductor device of claim 1, wherein the semiconductor device is selected from the group consisting of:

a) a diode laser;

b) a light-emitting diode;

c) a photodetector

d) a light amplifier

e) a far intraband infrared intraband detector;

f) an intraband far infrared emitter;

g) a heterojunction bipolar transistor;

h) a resonant tunneling diode;

k) a solar cell;

l) an optically bistable device;

m) an injection laser; and

n) a vertical cavity surface emitting laser.