Power standby mode circuitry for audiovisual device

• US 20050094036A1
• Filed: 02/12/2003
• Published: 05/05/2005
• Est. Priority Date: 02/27/2002
• Status: Abandoned Application

• Current Assignee: Koninklijke Philips Electronics N.V. (Koninklijke Philips N.V.)
• Original Assignee: Koninklijke Philips Electronics N.V. (Koninklijke Philips N.V.)
• Inventors: Tichelaar, Johannes Yzebrand
• Application Number:
  US10/505,505
• Publication Number:
  US 20050094036A1
• Time in Patent Office: Days
• US Class Current: 348/730
• CPC Class Codes: G06F 1/3293 by switching to a less power-consuming processor, e.g. sub-CPU
• CPC Class Codes: H02M 1/0032 Control circuits allowing low power mode operation, e.g. in standby mode
• CPC Class Codes: H04N 5/63 Generation or supply of power specially adapted for television receivers
• CPC Class Codes: Y02B 70/10 Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management
• CPC Class Codes: Y02D 30/00 Reducing energy consumption in communication networks
• CPC Class Codes: Y02D 30/50 in wire-line communication networks, e.g. low power modes or reduced link rate

Abstract

The problem of increased power consumption due to infrared remote control false alarm handling by a main TV controller (88) and power dissipation due to leakage current is addressed by fully delegating standby tasks to a low power delegate controller (90) with minimal local resources and having high performance and many dissipating system parts disabled. In low power standby mode the delegate controller (90) validates autonomously a remote control (42) command, a keypad (34) press, a timer alarm, and external interrupt etc. The TV system is powered up only when a command is valid. Use of a switched power supply voltage (70) reduces the leakage current problem. The delegate micro-controller is included on the same integrated circuit (IC) package as the main micro-controller, advantageously on the same IC die.

Claims

1. Low power standby circuitry comprising:

signal reception means (42);

means for decoding a signal received by the signal reception means;

a system-on-chip (82) incorporating a main micro-controller (88;

164); and

a delegate micro-controller (90;

140) included on a same integrated circuit package as the main micro-controller for controlling a voltage supply to at least part of a system-on-chip (82) upon receipt of a validated signal.

2. Low power standby circuitry as claimed in claim 1, wherein the delegate micro-controller (90) is operable to control the supply of at least one clock signal to said at least part of the system-on-chip (82).

3. Low power standby circuitry as claimed in claim 1, wherein the delegate micro-controller (90;

140) is embedded in the system-on-chip (82) on a same IC die.

4. Low power standby circuitry as claimed in claim 1, wherein the system-on-chip (82) is on a first IC die, and the delegate micro-controller is on an external die inside a same IC package as the first IC die, the system-on-chip (82) being fully powered off in low-power standby mode.

5. Low power standby circuitry as claimed in claim 1, which is operable to reduce a frequency of a clock signal and/or reduce a voltage of a voltage supply and/or switch a voltage of a voltage supply to the system-on-chip on entering a standby mode.

6. Low power standby circuitry as claimed in claim 1, which is operable to enable or increase at least one clock frequency and/or increase or enable at least one voltage supply on ending a standby mode.

7. Low power standby circuitry as claimed in claim 1, which is operable to first reduce or disable a clock frequency before reducing or disabling at least one voltage supply on entering a standby mode.

8. Low power standby circuitry as claimed in claim 1, which receives input from at least one of the signal reception means;

timing means; and

power supply means.

9. Low power standby circuitry as claimed in claim 1, wherein the delegate micro-controller (140) is located, in use, in a first voltage domain (152), separate from a second voltage domain (154) for the main micro-controller (164) of the system-on-chip.

10. An audiovisual device incorporating low power standby circuitry according to claim 1.