Frequency shift keying demodulation technique
First Claim
1. A method for demodulating a modulated signal from a sending device at a receiving device, where the modulated signal represents a series of data bits, the method comprising:
- receiving the modulated signal at the receiving device via an antenna;
sampling the received signal with a sampling clock to create original samples of the received signal;
delaying the original samples by a number of cycles of the sampling clock to create delayed samples; and
processing the original samples and the delayed samples to form an output indicative of the series of data bits represented by the modulated signal.
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Abstract
Improved digital FSK demodulator methods and circuitry are disclosed. The demodulation method can be implemented using a standard microcontroller such as is usually already present in a telemetry receiving device. The demodulation method is simple and, when a microcontroller is used, easy to implement using standard portions of the microcontroller (e.g., the UART) and/or through programming. In a preferred embodiment, the demodulation circuitry comprises a delay line, preferably a shift register comprising part of the microcontroller'"'"'s UART. The shift register delays samples of the received FSK modulated signal by a number of cycles so as to introduce a 90-degree delay. The received signal samples, and their delayed counterparts, are input to an XOR gate, whose output reflects whether a logic ‘0’ or ‘1’ has been received by the device, although filtering of this output make this determination more reliable. The circuitry can sample the received telemetered modulated signal at relatively low rates, thus saving power and microcontroller resources for other tasks. Only minimal analog components are required to receive and process the received signal beyond the microcontroller, greatly simplifying the demodulation circuitry.
55 Citations
26 Claims
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1. A method for demodulating a modulated signal from a sending device at a receiving device, where the modulated signal represents a series of data bits, the method comprising:
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receiving the modulated signal at the receiving device via an antenna;
sampling the received signal with a sampling clock to create original samples of the received signal;
delaying the original samples by a number of cycles of the sampling clock to create delayed samples; and
processing the original samples and the delayed samples to form an output indicative of the series of data bits represented by the modulated signal. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11)
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12. A method for demodulating a modulated signal from a sending device at a receiving device, where the modulated signal represents a series of data bits, the receiving device including a microcontroller, the method comprising:
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receiving the modulated signal at the receiving device via an antenna;
sampling the received signal at the microcontroller using a sampling clock to create original samples of the received signal;
delaying the original samples at the microcontroller using the sampling clock to create delayed samples; and
comparing at the microcontroller the original samples and the delayed samples to form an output indicative of the series of bits. - View Dependent Claims (13, 14, 15, 16, 17)
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18. A telemetry receiving device, comprising:
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an antenna for receiving a modulated signal from a sending device at a receiving device, where the modulated signal represents a series of data bits;
a sampler for digitizing the received signal in accordance with a sampling clock to form original samples;
delay circuitry for creating delayed samples from the original samples, wherein the delayed samples are delayed with respect to the original samples by a number of cycles of the sampling clock; and
logic circuitry for comparing the original samples and the delayed samples to produce an output indicative of the series of bits. - View Dependent Claims (19, 20, 21, 22, 23, 24, 25, 26)
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Specification