Semiconductor device and method for manufacturing the same

• US 20070131985A1
• Filed: 11/29/2006
• Published: 06/14/2007
• Est. Priority Date: 11/29/2005
• Status: Abandoned Application

• Current Assignee: Sanyo Electric Company Limited (Panasonic Holdings Corporation)
• Original Assignee: Sanyo Electric Company Limited (Panasonic Holdings Corporation)
• Inventors: Inoue, Yasunori, Shimada, Satoru, Yamaoka, Yoshikazu, Mizuhara, Hideki, Fujita, Kazunori
• Application Number:
  US11/605,485
• Publication Number:
  US 20070131985A1
• Time in Patent Office: Days
• US Class Current: 257/288
• CPC Class Codes: H01L 21/28061 the conductor comprising a metal or metal silicide formed by deposition, e.g. sputter deposition, i.e. without a silicidation reaction H01L21/28052 takes precedence
• CPC Class Codes: H01L 29/4925 with a multiple layer structure, e.g. several silicon layers with different crystal structure or grain arrangement with only a vertical doping structure or vertical doping variation H01L29/4916
• CPC Class Codes: H01L 29/78 with field effect produced by an insulated gate H01L29/7725, H01L29/775, H01L29/778 take precedence

Abstract

A semiconductor device and a method for manufacturing the same are provided, in which the work function of a gate electrode being in contact with a gate insulating film can be efficiently adjusted while depletion of the gate electrode is suppressed. An SOI substrate is composed of a p-type silicon substrate, a buried oxide film, and a single crystal silicon layer. Furthermore, source and drain regions are provided in the single crystal silicon layer. In the single crystal silicon layer, the surface between the source and drain regions serves as a channel layer. A gate insulating film is formed on the single crystal silicon layer (the channel layer). On the gate insulating film is provided a polysilicon gate electrode composed of metal particles of TiN and a polysilicon film. The metal particles of TiN include particles being in contact with the gate insulating film and particles being out of contact with this film.

Claims

1. A semiconductor device comprising:

a semiconductor substrate having a principal surface;

a channel region provided in the principal surface of the semiconductor substrate;

an insulating layer provided on the channel region; and

a semiconductor layer provided on the insulating layer, wherein

the semiconductor layer contains a metal portion disposed in a lower region of the semiconductor layer, and

the metal portion is out of contact with the insulating layer.

2. The semiconductor device according to claim 1, wherein the metal portion comprises a plurality of first metal particles.

3. The semiconductor device according to claim 2, wherein the semiconductor layer contains a plurality of second metal particles which is disposed in the semiconductor layer, and which is in contact with the insulating layer.

4. The semiconductor device according to claim 3, wherein the spacing between the adjacent second metal particles is smaller than a size of the second metal particles, and

at least some of the first metal particles have a size the same as that of the second metal particles and are disposed via a portion of the semiconductor layer which is between the adjacent second metal particles.

5. The semiconductor device according to claim 3, wherein the first metal particles and the second metal particles are arranged two-dimensionally in a lower region of the semiconductor layer.

6. The semiconductor device according to claim 1, wherein the semiconductor layer contains an impurity of a predetermined conduction type and the impurity is introduced into the semiconductor layer by implantation.

7. The semiconductor device according to claim 2, wherein the semiconductor layer contains an impurity of a predetermined conduction type and the impurity is introduced into the semiconductor layer by implantation.

8. The semiconductor device according to claim 3, wherein at least some of the first metal particles are disposed via a portion of the semiconductor layer which is between the adjacent second metal particles.

9. The semiconductor device according to claim 3, wherein the semiconductor layer contains an impurity of a predetermined conduction type and the impurity is introduced into the semiconductor layer by implantation.

10. The semiconductor device according to claim 1, wherein the metal portion comprises a thin metal film.

11. The semiconductor device according to claim 1, wherein a thickness of the semiconductor layer between the metal portion and the insulating layer is 3 nm or less.

12. A semiconductor device comprising:

a semiconductor substrate having a principal surface;

a channel region provided in the principal surface of the semiconductor substrate;

an insulating layer provided on the channel region; and

a semiconductor layer provided on the insulating layer, wherein

the semiconductor layer contains a plurality of metal particles disposed in a lower region of the semiconductor layer, and

a first reaction layer formed through reaction with the semiconductor layer is provided on the surface of the metal particles.

13. The semiconductor device according to claim 12, wherein:

some of the metal particles are arranged so as to be in contact with the insulating layer; and

a second reaction layer formed through reaction with the insulating layer is provided in the proximity of an interface between the metal particles and the insulating layer.

14. The semiconductor device according to claim 12, wherein:

the semiconductor layer is formed of a film containing silicon; and

the first reaction layer is formed of a metal silicide.

15. The semiconductor device according to claim 14, wherein the metal particles are formed of a metal nitride and a ratio of the metal atoms forming the metal nitride is higher than a ratio of nitrogen atoms forming the metal nitride.

16. A method for manufacturing a semiconductor device, comprising:

a first step of forming an insulating layer on a channel region provided on a principal surface of a semiconductor substrate;

a second step of forming a first semiconductor layer into a pattern of dots on the insulating layer;

a third step of forming a plurality of metal particles on the insulating layer and the first semiconductor layer;

a fourth step of forming a second semiconductor layer on the first semiconductor layer and the metal particles; and

a fifth step of forming an electrode by processing the insulating layer, the first semiconductor layer, and the second semiconductor layer, wherein

the metal particles formed in the third step are composed of first metal particles formed on the first semiconductor layer and second metal particles formed on the insulating layer.

17. A method for manufacturing a semiconductor device, comprising:

a first step of forming an insulating layer on a channel region provided in a principal surface of a semiconductor substrate;

a second step of forming metal particles on the insulating layer;

a third step of forming a semiconductor layer on the insulating layer and the metal particles; and

a fourth step of forming an electrode by processing the insulating layer and the semiconductor layer, wherein a fifth step of forming a reaction layer on a surface of the metal particles by means of heat treatment is provided either or both before and after the fourth step.