Graphics processor with arithmetic and elementary function units
First Claim
1. An apparatus comprising:
- at least one arithmetic logic unit (ALU) operative to perform arithmetic operations; and
at least one elementary function unit operative to compute elementary functions, wherein the at least one elementary function unit and the at least one ALU are operable on multiple threads in parallel.
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Abstract
A graphics processor capable of efficiently performing arithmetic operations and computing elementary functions is described. The graphics processor has at least one arithmetic logic unit (ALU) that can perform arithmetic operations and at least one elementary function unit that can compute elementary functions. The ALU(s) and elementary function unit(s) may be arranged such that they can operate in parallel to improve throughput. The graphics processor may also include fewer elementary function units than ALUs, e.g., four ALUs and a single elementary function unit. The four ALUs may perform an arithmetic operation on (1) four components of an attribute for one pixel or (2) one component of an attribute for four pixels. The single elementary function unit may operate on one component of one pixel at a time. The use of a single elementary function unit may reduce cost while still providing good performance.
161 Citations
25 Claims
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1. An apparatus comprising:
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at least one arithmetic logic unit (ALU) operative to perform arithmetic operations; and at least one elementary function unit operative to compute elementary functions, wherein the at least one elementary function unit and the at least one ALU are operable on multiple threads in parallel. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17)
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18. An integrated circuit comprising:
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at least one arithmetic logic unit (ALU) operative to perform arithmetic operations; and at least one elementary function unit operative to compute elementary functions, wherein the at least one elementary function unit and the at least one ALU are operable on multiple threads in parallel. - View Dependent Claims (19)
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20. A wireless device comprising:
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a graphics processor comprising at least one arithmetic logic unit (ALU) operative to perform arithmetic operations and at least one elementary function unit operative to compute elementary functions, wherein the at least one elementary function unit and the at least one ALU are operable on multiple threads in parallel; and a memory system operative to store data for the graphics processor. - View Dependent Claims (21)
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22. An apparatus comprising:
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at least one arithmetic logic unit (ALU) operative to perform arithmetic operations; and at least one elementary function unit operative to compute elementary functions, wherein the number of the at least one elementary function unit is fewer than the number of the at least one ALU. - View Dependent Claims (23, 24, 25)
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Specification