Digital Device Being Worked with Exterior Power Supply and Control Method Thereof

• US 20080143479A1
• Filed: 02/27/2006
• Published: 06/19/2008
• Est. Priority Date: 02/28/2005
• Status: Abandoned Application

• Current Assignee: Unipas Incorporated
• Original Assignee: Unipas Incorporated
• Inventors: Kim, Gab Sik
• Application Number:
  US11/883,872
• Publication Number:
  US 20080143479A1
• Time in Patent Office: Days
• US Class Current: 340/5.65
• CPC Class Codes: G07C 2009/00412 the transmitted data signal being encrypted
• CPC Class Codes: G07C 2009/00603 by power transmission from lock
• CPC Class Codes: G07C 2009/00761 with data transmission performed by connected means, e.g. mechanical contacts, plugs, connectors
• CPC Class Codes: G07C 9/00309 operated with bidirectional data transmission between data carrier and locks

Abstract

Disclosed are a digital apparatus operating using external power and a method for controlling the digital apparatus. The digital apparatus includes a power supply for supplying power, a one-wire interface for determining if an input signal is a reset signal, a ready signal, a read signal or a write signal, the one-wire interface being connected to the power supply, an oscillator for providing a clock signal to the one-wire interface, a controller for performing a reset operation, a ready operation, a read operation or a write operation according to determination results of the one-wire interface, a RAM and a ROM for storing data, a timer for providing time information, and a RNG for encrypting data.

Claims

1. A digital apparatus operating using external power, the digital apparatus comprising:

a power supply for supplying power;

a one-wire interface for determining if an input signal is a reset signal, a ready signal, a read signal or a write signal, the one-wire interface being connected to the power supply;

an oscillator for providing a clock signal to the one-wire interface;

a controller for performing a reset operation, a ready operation, a read operation or a write operation according to determination results of the one-wire interface;

a Random Access Memory (RAM) and a Read Only Memory (ROM) for storing data;

a timer for providing time information; and

a RNG for encrypting data.

2. The digital apparatus according to claim 1, further comprising a chip program-writing interface installed within the digital apparatus in order to enable external data to be written in the memory.

3. The digital apparatus according to claim 1 or 2, wherein the power supply comprises:

a pull-up resistor;

a rectifier diode to which a data signal line is connected forward; and

a smoothing capacitor connected between a cathode of the rectifier diode and a ground.

4. The digital apparatus according to claim 1 or 2, wherein the one-wire interface comprises:

a unit width counter for controlling a width of the input signal;

a unit width converter for adjusting the width of the input signal;

a buffer of one byte for storing input signal data of one byte;

a CRC buffer for storing a CRC of the input signal;

a CRC comparator for comparison of the CRC;

a main controller for determining if the input signal is the reset signal, the ready signal, the read signal or the write signal; and

a RAM controller for controlling the RAM.

5. A method for controlling a digital apparatus operating using external power, the method comprising a step of determining if an input signal is a reset packet signal, a ready packet signal, a read packet signal or a write packet signal when an operation starts,

wherein timing of the reset packet signal includes a reset interval in a low state, a hold interval in a high state, and a response interval in a low state, timing of the ready packet signal includes a request interval in a low state, a hold interval in a high state, ready response data, and a data processing interval, timing of the read packet signal includes a request interval in a low state, a hold interval in a high state, a data interval, and a data processing interval, and timing of the write packet signal includes a request interval in a low state, a hold interval in a high state, a data interval, and a data processing interval.

6. The method according to claim 5, wherein, in the reset packet signal, time T_RESET of the reset interval is greater than or equal to 4T_UNIT, response start time T_RACK—

_START is less than or equal to (T_UNIT+T_CLOCK), and response end time T<sub>RACK—

END</sub> is greater than or equal to (2T_UNIT+T_CLOCK), and is less than or equal to 3T_UNIT.

7. The method according to claim 5, wherein, in the ready packet signal, time T_REQ of the request interval is greater than or equal to (T_UNIT−

T_CLOCK), and is less than or equal to T_UNIT, ready start time T<sub>READY—

START</sub> is less than or equal to (T_UNIT+T_CLOCK), ready end time T<sub>READY—

END</sub> is greater than or equal to (2T_UNIT+T_CLOCK), and is less than or equal to 3T_UNIT, and ready interval time T<sub>READY—

BIT—

INTV</sub> is greater than or equal to 10T_UNIT.

8. The method according to claim 5, wherein, the read packet signal, time T_REQ of the request interval is greater than or equal to (T_UNIT−

T_CLOCK), and is less than or equal to T_UNIT, read start time T<sub>READ—

START</sub> is less than or equal to (T_UNIT+T_CLOCK), read end time T<sub>READ—

END</sub> is greater than or equal to (2T_UNIT+T_CLOCK), and is less than or equal to 3T_UNIT, read bit interval time T<sub>READ—

BIT—

INTV</sub> is greater than or equal to 6T_UNIT, and read byte interval time T<sub>READ—

BYTE—

INTV</sub> is greater than or equal to 2T_UNIT.

9. The method according to claim 5, wherein, in the write packet signal, time T_REQ of the request interval is greater than or equal to (T_UNIT−

T_CLOCK), and is less than or equal to T_UNIT, write start time T<sub>WRITE—

START</sub> is less than or equal to (T_UNIT+T_CLOCK), write end time T<sub>WRITE—

END</sub> is greater than or equal to (2T_UNIT+T_CLOCK), and is less than or equal to 3T_UNIT, write bit interval time T<sub>WRITE—

BIT—

INTV</sub> is greater than or equal to 6T_UNIT, and write byte interval time T<sub>WRITE—

BYTE—

INTV</sub> is greater than or equal to 2T_UNIT.