Advanced mezzanine card for digital network data inspection

• US 20090006659A1
• Filed: 06/20/2008
• Published: 01/01/2009
• Est. Priority Date: 10/19/2001
• Status: Abandoned Application

• Current Assignee: Global Velocity, Inc.
• Original Assignee: Global Velocity, Inc.
• Inventors: Collins, Jack M., Kastner, Charles M., Kulig, Matthew P.
• Application Number:
  US12/214,590
• Publication Number:
  US 20090006659A1
• Time in Patent Office: Days
• US Class Current: 710/8
• CPC Class Codes: H04L 63/0245 Filtering by information in the payload
• CPC Class Codes: H04L 63/10 for controlling access to devices or network resources
• CPC Class Codes: H04L 63/145 the attack involving the propagation of malware through the network, e.g. viruses, trojans or worms
• CPC Class Codes: H04L 65/1101 Session protocols
• CPC Class Codes: H04L 65/612 for unicast
• CPC Class Codes: H04L 65/65 Network streaming protocols, e.g. real-time transport protocol [RTP] or real-time control protocol [RTCP]
• CPC Class Codes: H04L 69/12 Protocol engines
• CPC Class Codes: H04L 69/16 Implementation or adaptation of Internet protocol [IP], of transmission control protocol [TCP] or of user datagram protocol [UDP]
• CPC Class Codes: H04L 69/163 In-band adaptation of TCP data exchange; In-band control procedures
• CPC Class Codes: H04L 69/22 Parsing or analysis of headers
• CPC Class Codes: H04L 69/329 in the application layer [OSI layer 7]
• CPC Class Codes: H04W 88/08 Access point devices
• CPC Class Codes: H04W 92/045 between access point and backbone network device

Abstract

Telecommunications computing apparatus and methods for performing deep packet inspection and other processing of data packets traversing high speed digital networks (15) such as the Internet. An apparatus embodiment of the present invention comprises a reconfigurable logic device (10); coupled to the reconfigurable logic device (10), means (11) for coupling the reconfigurable logic device (10) to an external digital network (15); and coupled to the reconfigurable logic device (10), an interface (16-19) for coupling the reconfigurable logic device (10) to at least one peripheral device (8) that is not part of said external digital network (15).

Claims

1. Telecommunications computing apparatus comprising:

a reconfigurable logic device;

coupled to the reconfigurable logic device, means for coupling the reconfigurable logic device to an external digital network; and

coupled to the reconfigurable logic device, an interface for coupling the reconfigurable logic device to at least one peripheral device that is not part of said external digital network.

2. The apparatus of claim 1 wherein the reconfigurable logic device comprises an FPGA.

3. The apparatus of claim 1 wherein the interface comprises at least one PCI Express connector.

4. The apparatus of claim 1 wherein the interface comprises at least one FPGA.

5. The apparatus of claim 1 wherein the interface comprises at least one DMA (Direct Memory Access) component and at least one PCI target interface component.

6. The apparatus of claim 1 wherein the coupling means comprises:

a physical coupling device connected to the reconfigurable logic device;

an edge connector connected to the physical coupling device;

a backplane connected to the edge connector; and

at least one line card connected to the backplane.

7. The apparatus of claim 1 further comprising a backplane, wherein each said peripheral device is connected to the backplane.

8. The apparatus of claim 1 wherein said apparatus consists solely of application-specific and reconfigurable hardware elements.

9. The apparatus of claim 1 wherein said reconfigurable logic device performs the following functions:

reassembly of TCP data by solely hardware means, wherein the TCP data emanates from the external digital network;

search for known patterns within the reassembled TCP data; and

policy management decisions made with respect to patterns found within the reassembled TCP data.

10. The apparatus of claim 1 when the external digital network is a network from the group of networks consisting of at least one of the Internet, a wireless network, a wired network, a local area network (LAN), a wide area network (WAN), and the public switched telephone network (PSTN).

11. The apparatus of claim 1 wherein the reconfigurable logic device performs deep packet inspection on data packets emanating from the external digital network.

12. The apparatus of claim 1 wherein the reconfigurable logic device performs at least one function from the following group of functions:

flow control of network traffic on the external digital network;

traffic analysis and management of network traffic on the external digital network;

bandwidth shaping;

advanced routing applications.

13. The apparatus of claim 1 wherein said apparatus is part of a system for controlling transmission of data packets through the external digital network, each data packet comprising a payload portion, the external digital network comprising a plurality of network-capable devices communicatively coupled to a network access point (NAP), said system comprising:

the apparatus of claim 1, wherein said apparatus contains content match information and is operable to;

inspect payload portions of data packets transiting the NAP;

forward an inspected data packet when information within the payload portion of an inspected data packet is not substantially similar to content match information; and

when information within the payload portion of an inspected data packet is substantially similar to content match information, temporarily store the inspected data packet, and send a message to a network-capable device.

14. A method for inspecting payload portions of data packets transiting a network access point (NAP), wherein:

the NAP is part of the external digital network of claim 1; and

the reconfigurable logic device of claim 1;

further comprises a backplane, each peripheral device being connected to the backplane;

forwards reassembled payload portions of data packets, as well as metadata used to identify TCP connections corresponding to the packets, to relevant peripheral devices;

allows an inspected data packet to traverse the network when information within a payload portion of an inspected data packet is not substantially similar to prestored content match information; and

when information within a payload portion of an inspected data packet is substantially similar to prestored content match information, performs at least one of the following four steps;

reports the match to at least one peripheral device;

prevents the packet from further traversing the network;

allows subsequent packets from the corresponding TCP connection to pass through the reconfigurable logic device undisputed;

attempts to forcibly terminate the corresponding TCP connection.

15. The apparatus of claim 1 further comprising at least one bank of SDRAM (Synchronous Dynamic Random Access Memory) memory coupled to the reconfigurable logic device.

16. The apparatus of claim 1 further comprising at least one bank of SRAM (Static Random Access Memory) coupled to the reconfigurable logic device.

17. The apparatus of claim 1 wherein the apparatus complies with the AdvancedMC Standard.

18. The apparatus of claim 1 further comprising an intelligent microcontroller coupled to said reconfigurable logic device, said microcontroller adapted to manage power consumption of elements of the apparatus, and to perform other control functions pursuant to the AdvancedMC Standard.

19. The apparatus of claim 1 wherein the reconfigurable logic device is reprogrammed by a technique from the group of techniques consisting of:

loading the reconfigurable logic device via a flash memory coupled to the reconfigurable logic device, reprogramming via installed JTAG headers coupled to the reconfigurable logic device, and reprogramming via JTAG headers provided on a backplane to which the reconfigurable logic device is coupled.

20. Apparatus comprising:

telecommunications computing architecture elements compliant with the AdvancedMC Standard;

coupled to said elements, means for communicating with an external digital network; and

coupled to said elements, means for interfacing with at least one peripheral device that is not part of said external digital network.

21. The apparatus of claim 20 wherein said interfacing means comprises at lest one PCI Express connector.

22. Telecommunications computing apparatus compliant with the AdvancedMC Standard, said apparatus comprising:

a reconfigurable logic device; and

coupled to the reconfigurable logic device, an interface for coupling the reconfigurable logic device to an external digital network;

wherein

the reconfigurable logic device performs deep packet inspection of data packets entering the reconfigurable logic device from the external digital network.

23. The apparatus of claim 22 wherein the reconfigurable logic device comprises an FPGA.

24. The apparatus of claim 22 wherein the deep packet inspection comprises content matching between content portions of data packets entering the reconfigurable logic device from the external digital network and prestored content templates accessible to the reconfigurable logic device.