Multi-Layer Semiconductor Structure and Manufacturing Method Thereof
First Claim
1. A power metal-oxide-semiconductor field effect transistor (MOSFET) structure, comprising:
- at least one first gate placed in a cell area of a die and formed in a semiconductor substrate;
at least one second gate placed at the peripheral of the die and formed in the semiconductor substrate;
wherein the first and second gates are electrically connected, and the second gate are connected to a contact connecting to a first bonding pad to transmit gate control signals.
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Abstract
A power MOSFET structure comprises at least one first gate in the cell area and at least one second gate at the peripheral that are both in a semiconductor substrate. The first and second gates are electrically connected, and the second gate is connected to a contact so as to electrically connect to a bond pad for transmitting gate control signals. The semiconductor substrate comprises a first semiconductor layer, a second semiconductor layer and a third semiconductor layer in downward sequence. The first and third semiconductor layers are of a first conductive type, e.g., n-type, and the second semiconductor layer is of a second conductive type, e.g., p-type. The first and third semiconductor layers serve as the source and the drain, respectively.
14 Citations
23 Claims
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1. A power metal-oxide-semiconductor field effect transistor (MOSFET) structure, comprising:
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at least one first gate placed in a cell area of a die and formed in a semiconductor substrate; at least one second gate placed at the peripheral of the die and formed in the semiconductor substrate; wherein the first and second gates are electrically connected, and the second gate are connected to a contact connecting to a first bonding pad to transmit gate control signals. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12)
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13. A method for manufacturing a power MOSFET, comprising:
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forming at least one first trench and at least one second trench in a semiconductor substrate, wherein the first trench is in a cell area of a die and the second trench is at the peripheral of the die; filling a conductive layer in the first trench and the second trench to form a first gate and a second gate, wherein the first and second gates are electrically connected; forming a dielectric layer on the first and second gates and the semiconductor substrate; and forming a contact penetrating through the dielectric layer to the second gate, the contact being electrically connected to a first bonding pad for transmitting gate control signals. - View Dependent Claims (14, 15, 16, 17, 18, 19, 20, 21, 22, 23)
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Specification