SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME

• US 20090149016A1
• Filed: 12/08/2008
• Published: 06/11/2009
• Est. Priority Date: 12/06/2007
• Status: Abandoned Application

• Current Assignee: Samsung Electronics Co. Ltd.
• Original Assignee: Samsung Electronics Co. Ltd.
• Inventors: PARK, Jin-Woo, HWANG, Tae-Joo, KIM, Nam-Seog
• Application Number:
  US12/330,416
• Publication Number:
  US 20090149016A1
• Time in Patent Office: Days
• US Class Current: 438/614
• CPC Class Codes: H01L 2224/05001 Internal layers
• CPC Class Codes: H01L 2224/05022 the internal layer being at least partially embedded in the surface
• CPC Class Codes: H01L 2224/05027 the internal layer extending out of an opening
• CPC Class Codes: H01L 2224/05124 Aluminium [Al] as principal constituent
• CPC Class Codes: H01L 2224/05166 Titanium [Ti] as principal constituent
• CPC Class Codes: H01L 2224/05572 the external layer extending out of an opening
• CPC Class Codes: H01L 2224/10126 Bump collar
• CPC Class Codes: H01L 2224/1308 being stacked
• CPC Class Codes: H01L 2224/13099 Material
• CPC Class Codes: H01L 2224/13565 Only outside the bonding interface of the bump connector
• CPC Class Codes: H01L 2224/16 of an individual bump connector
• CPC Class Codes: H01L 24/05 of an individual bonding area
• CPC Class Codes: H01L 24/06 of a plurality of bonding areas
• CPC Class Codes: H01L 24/11 Manufacturing methods for bumps on insulating substrates H01L21/4853
• CPC Class Codes: H01L 24/13 of an individual bump connector
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01005 Boron [B]
• CPC Class Codes: H01L 2924/01006 Carbon [C]
• CPC Class Codes: H01L 2924/01011 Sodium [Na]
• CPC Class Codes: H01L 2924/01012 Magnesium [Mg]
• CPC Class Codes: H01L 2924/01013 : Aluminum [Al]
• CPC Class Codes: H01L 2924/01022 : Titanium [Ti]
• CPC Class Codes: H01L 2924/01029 : Copper [Cu]
• CPC Class Codes: H01L 2924/0103 : Zinc [Zn]
• CPC Class Codes: H01L 2924/01033 : Arsenic [As]
• CPC Class Codes: H01L 2924/01047 : Silver [Ag]
• CPC Class Codes: H01L 2924/01078 : Platinum [Pt]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/01082 : Lead [Pb]
• CPC Class Codes: H01L 2924/014 : Solder alloys

Abstract

Provided is a semiconductor device and a method of fabricating the same. The method of fabricating the semiconductor device includes forming a mask pattern having an opening corresponding to an electrode pad formed on a semiconductor substrate; forming a bump by filling the opening with a conductive first material; forming a sidewall film on sidewalls of the bump using a second material; forming a connection member between an upper surface of the bump and a wire substrate using a conductive third material in order to electrically connect the bump and the wire substrate; and forming an underfill resin between the wire substrate and the semiconductor substrate, wherein a wetting angle between the second material and the third material is greater than that between the first material and the third material.

Claims

1. A method of fabricating a semiconductor device comprising:

forming a mask pattern defining an opening on a semiconductor substrate, the opening corresponding to an electrode pad formed on the semiconductor substrate;

forming a bump on the electrode pad by filling the opening defined by the mask pattern with a first material;

removing the mask pattern;

forming a sidewall film on sidewalls of the bump using a second material;

forming a connection member using a third material between an upper surface of the bump and a wire substrate so as to electrically connect the bump and the wire substrate; and

forming an underfill resin between the wire substrate and the semiconductor substrate,

wherein a wetting angle between the second material and the third material is greater than a wetting angle between the first material and the third material.

2. The method of claim 1, further comprising forming a top film using a fourth material on an upper surface of the bump prior to forming the third material, wherein the wetting angle between the second material and the third material is greater than a wetting angle between the third material and the fourth material.

3. The method of claim 2, wherein the wetting angle between the third material and the fourth material is less than 90°

and the wetting angle between the second material and the third material is greater than 90°

.

4. The method of claim 1, wherein the wetting angle between the first material and the third material is less than 90°

and the wetting angle between the second material and the third material is greater than 90°

.

5. The method of claim 1, wherein the forming of the bump using the first material comprises forming a copper (Cu) bump by at least one of electroplating and electroless plating.

6. The method of claim 5, wherein the forming of the connection member between the upper surface of the bump and the wire substrate using the third material comprises:

coating a first solder layer on the upper surface of the bump;

coating a second solder layer on a lower surface of the wire substrate; and

forming the connection member by reflowing and compressing the first solder layer and the second solder layer.

7. The method of claim 6, further comprising forming a top film using gold (Au) on the upper surface of the bump prior to forming the connection member using the third material, wherein the wetting angle between the second material and the third material is greater than a wetting angle between the third material and Au.

8. The method of claim 5, wherein the forming of the sidewall film using the second material comprises forming a copper oxide film.

9. The method of claim 8, wherein the forming of the sidewall film using a copper oxide film comprises plating the copper oxide film.

10. The method of claim 8, wherein the forming of the sidewall film using a copper oxide film comprises oxidizing the bump.

11. The method of claim 10, wherein oxidizing the bump comprises processing the bump with plasma in an oxygen atmosphere.

12. The method of claim 10, wherein oxidizing the bump comprises:

etching the surface of the bump in an atmosphere containing H₂SO₄ and H₂O₂ or an atmosphere containing sodium peroxosulphate (NaPS); and

treating the bump using a basic solution containing hydroxide ions such that the copper oxide film has a ratio of Cu;

O greater than that of Cu₂O.

13. The method of claim 12, further comprising reducing the copper oxide film using Morpholine Borane after treating the bump.

14. A method of fabricating a semiconductor device comprising:

forming a mask pattern defining an opening on a semiconductor substrate, the opening corresponding to an electrode pad formed on the semiconductor substrate;

forming a sidewall film using a second material on inner walls of the opening;

forming a bump by filling the opening with a first material;

removing the mask pattern;

forming a connection member between an upper surface of the bump and a wire substrate using a third material to electrically connect the bump and the wire substrate; and

forming an underfill resin between the wire substrate and the semiconductor substrate,

wherein a wetting angle between the second material and the third material is greater than a wetting angle between the first material and the third material.

15. The method of claim 14, wherein forming the bump using the first material comprises forming a copper (Cu) bump using at least one of electroplating and electroless plating, and wherein forming the sidewall film using the second material comprises forming a Cu oxide film using at least one of electroplating and electroless plating.

16. The method of claim 15, wherein forming the connection member between the upper surface of the bump and the wire substrate using the conductive third material comprises:

coating a first solder layer on the upper surface of the bump;

coating a second solder layer on a lower surface of the wire substrate; and

forming the connection member by reflowing and compressing the first solder layer and the second solder layer.

17. The method of claim 16, further comprising forming a top film using gold (Au) on the upper surface of the bump prior to forming the connection member using the third material, wherein the wetting angle between the second material and the third material is greater than a wetting angle between the third material and Au.

18. A method of fabricating a semiconductor device comprising:

forming a mask pattern defining an opening on a semiconductor substrate, the opening corresponding to an electrode pad formed on the semiconductor substrate;

forming a bump on the electrode pad by filling the opening with a first material;

removing the mask pattern;

forming a sidewall film on sidewalls of the bump using a second material;

forming a top film on an upper surface of the bump using a fourth material; and

forming a connection member between the top film and a wire substrate using a third material so as to electrically connect the bump and the wire substrate;

wherein a wetting angle between the second material and the third material is greater than a wetting angle between the fourth material and the third material.

19. The method of claim 18, wherein forming the mask pattern comprises forming the mask pattern on at least one of a first protective film and a second protective film disposed on the substrate.

20. The method of claim 18, further comprising:

forming a first intermediate connection film on the electrode pad; and

forming a second intermediate connection film on the first intermediate connection film such that the first and second intermediate connection films are disposed between the electrode pad and the bump.