COMMUNICATION METHOD AND INTERFACE BETWEEN A COMPANION CHIP AND A MICROCONTROLLER

• US 20100088436A1
• Filed: 07/23/2008
• Published: 04/08/2010
• Est. Priority Date: 08/16/2007
• Status: Abandoned Application

• Current Assignee: Robert Bosch GmbH
• Original Assignee: Robert Bosch GmbH
• Inventors: Schmitt, Stefen, Hanisch, Juergen, Knauss, Matthias
• Application Number:
  US12/527,010
• Publication Number:
  US 20100088436A1
• Time in Patent Office: Days
• US Class Current: 710/35
• CPC Class Codes: G06F 13/4291 using a clocked protocol

Abstract

The invention relates to a communication method and interface between a companion chip (CC) and a microcontroller (MC), a communication protocol being transmitted, having a first group of data (10) being drawn on for direct, non-real-time-critical access to the chip (CC), and a second group of data (20) based on which a real-time-critical access to the chip (CC) takes place, the data groups (10, 20) each comprising an operation code (OC), the length of which is shorter in the second data group (20) than in the first data group (10), and each data group (10, 20) being identifiable by the bit pattern of the operation code (OC).

Claims

1. A communication method between a companion chip (CC) and a microcontroller (MC), in the case of which a communication protocol is transmitted, including a first group of data (10) which is used for direct, non-real-time-critical access to the chip (CC), and including a second group of data (20), based on which a real-time-critical access to the chip (CC) takes place, the data groups (10, 20) each comprising an operation code (OC), the length of which is shorter in the second data group (20) than in the first data group (10), and each data group (10, 20) being identifiable via the bit pattern of the operation code (OC).

2. The method as recited in claim 1, in which the bit pattern of the operation code (OC) contains information on whether the first group of data (10) is used for a single access (11) or a burst access (12) to the companion chip (CC).

3. The method as recited in claim 1, in which the bit pattern of the operation code (OC) contains information on whether a direct access to the modules or FIFOs of the chip (CC) is carried out.

4. The method as recited in claim 1, in which the bit pattern of the operation code (OC) contains information that characterizes the results of an asynchronous read access, and via which the access may be identified.

5. A computer program that may be loaded in the internal memory of a digital computer system, and that includes software code parts for carrying out a method as recited in claim 1 when the computer program is run on the computer system.

6. A computer program product comprising a computer-readable medium that contains program instructions that may be implemented by a computer, and in the case of which the program instructions contain a computer program according to claim 5.

7. A communication interface between a companion chip (CC) and a microcontroller (MC), which is designed to carry out the communication method as recited in claim 1.

8. The interface as recited in claim 7, which is designed for the synchronous serial transfer of data (10, 20).

9. The interface as recited in claim 8, which is designed to prevent an access in addition to a real-time-critical access.

10. The interface as recited in claim 7, which is designed for direct access by the microcontroller (MC) to a memory (M) of the companion chip (CC).

11. The interface as recited in claim 7, which is designed to transfer data (10, 20) in a time frame of up to 5 μ

s to 10 μ

s.

12. A companion chip (CC), in the case of which a hardware interpreter module (I) is provided to process the communication protocol as recited in claim 1.

13. The companion chip (CC) as recited in claim 12, in the case of which the hardware interpreter module (I) is designed to modify the operation code (OC) of the second group of data (20).

14. The chip (CC) as recited in claim 12, which includes a functionality for processing rotational speed data, injection data, and/or ignition data.

15. A microcontroller (MC) comprising a software interpreter module for processing the communication protocol as recited in one claim 1.