High-Injection Heterojunction Bipolar Transistor

• US 20100140587A1
• Filed: 10/16/2008
• Published: 06/10/2010
• Est. Priority Date: 10/31/2007
• Status: Abandoned Application

• Current Assignee: BAE Systems Information and Electronic Systems Integration Incorporated (BAE Systems Plc)
• Original Assignee: BAE Systems Information and Electronic Systems Integration Incorporated (BAE Systems Plc)
• Inventors: Carothers, Daniel N., Pomerene, Andrew T.S.
• Application Number:
  US12/523,807
• Publication Number:
  US 20100140587A1
• Time in Patent Office: Days
• US Class Current: 257/14
• CPC Class Codes: H01L 29/66242 Heterojunction transistors [HBT] with an active layer made of a group 13/15 material H01L29/66318
• CPC Class Codes: H01L 29/7378 comprising lattice mismatched active layers, e.g. SiGe strained layer transistors
• CPC Class Codes: H01L 31/105 the potential barrier being of the PIN type
• CPC Class Codes: H01L 31/18 Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof

Abstract

A method for manufacturing high-injection heterojunction bipolar transistor capable of being used as a photonic device is disclosed. A sub-collector layer is formed on a substrate. A collector layer is then deposited on top of the sub-collector layer. After a base layer has been deposited on top of the collector layer, a quantum well layer is deposited on top of the base layer. An emitter is subsequently formed on top of the quantum well layer.

Claims

1. A method for manufacturing a high-injection heterojunction bipolar transistor capable of being used as a photonic device, said method comprising:

forming a sub-collector layer on a substrate;

depositing a collector layer on top of said sub-collector layer;

depositing a base layer on top of said collector layer;

depositing a quantum well layer on top of said base layer; and

forming an emitter on top of said quantum well layer.

2. The method of claim 1, wherein said sub-collector layer is formed by N+ implants.

3. The method of claim 1, wherein said sub-collector layer is formed by P+ implants.

4. The method of claim 1, wherein said depositing steps are performed by chemical vapor depositions.

5. The method of claim 1, wherein said quantum well layer is formed by silicon-germanium.

6. The method of claim 1, wherein said emitter is formed by N+ implants.

7. The method of claim 1, wherein said emitter is formed by P+ implants.

8. A high-injection heterojunction bipolar transistor comprising:

a collector;

an emitter;

a base; and

at least one quantum well located between said emitter and said base.

9. The high-injection heterojunction bipolar transistor of claim 8, wherein said base, said at least one quantum well, and said emitter form a P-i-N structure.

10. The high-injection heterojunction bipolar transistor of claim 8, wherein said emitter, said at least one quantum well, and said base form a P-i-N structure.