RESISTIVE MEMORY

• US 20130010527A1
• Filed: 09/14/2012
• Published: 01/10/2013
• Est. Priority Date: 10/31/2008
• Status: Active Grant

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Micron Technology, Inc.
• Inventors: Ma, Yantao, Liu, Jun
• Granted Patent: US 8,559,239 B2
• Time in Patent Office: Days
• US Class Current: 365/148
• CPC Class Codes: G11C 11/161 details concerning the memory cell structure, e.g. the layers of the ferromagnetic memory cell
• CPC Class Codes: G11C 11/1659 Cell access
• CPC Class Codes: G11C 11/1673 Reading or sensing circuits or methods
• CPC Class Codes: G11C 11/1675 Writing or programming circuits or methods
• CPC Class Codes: G11C 11/1693 Timing circuits or methods
• CPC Class Codes: G11C 11/1697 Power supply circuits
• CPC Class Codes: G11C 11/5607 using magnetic storage elements
• CPC Class Codes: G11C 13/0004 comprising amorphous/crystalline phase transition cells
• CPC Class Codes: G11C 13/0007 comprising metal oxide memory material, e.g. perovskites
• CPC Class Codes: G11C 13/0014 comprising cells based on organic memory material
• CPC Class Codes: G11C 13/0016 comprising polymers
• CPC Class Codes: G11C 13/0038 Power supply circuits
• CPC Class Codes: G11C 13/0069 Writing or programming circuits or methods
• CPC Class Codes: G11C 2013/0073 Write using bi-directional cell biasing
• CPC Class Codes: G11C 2013/0078 Write using current through the cell
• CPC Class Codes: G11C 2213/31 Material having complex metal oxide, e.g. perovskite structure
• CPC Class Codes: G11C 2213/32 Material having simple binary metal oxide structure

Abstract

The present disclosure includes resistive memory devices and systems having resistive memory cells, as well as methods for operating the resistive memory cells. One memory device embodiment includes at least one resistive memory element, a programming circuit, and a sensing circuit. For example, the programming circuit can include a switch configured to select one of N programming currents for programming the at least one resistive memory element, where each of the N programming currents has a unique combination of current direction and magnitude, with N corresponding to the number of resistance states of the at least one memory element. In one or more embodiments, the sensing circuit can be arranged for sensing of the N resistance states.

Claims

1. A circuit, comprising:

a multiplexer having an output coupled to an intermediate potential through a resistive element during operation of the circuit;

one or more pairs of first transistors coupled between a potential greater than the intermediate potential and a corresponding at least one input of the multiplexer; and

one or more pairs of second transistors coupled between a potential less than the intermediate potential and a corresponding at least one input of the multiplexer,

wherein the multiplexer is configured to select at least one of a number of currents that respectively flow through at least one of the pairs of first or pairs of second transistors in response to a selection signal for programming the resistive element, each of the number of currents having a unique combination of current direction and magnitude.

2. The circuit of claim 1, wherein the intermediate potential is midway between the potential greater than the intermediate potential and the potential less than the intermediate potential.

3. The circuit of claim 1, wherein the difference between the intermediate potential and the potential greater than the intermediate potential is less than the difference between the intermediate potential and the potential less than the intermediate potential.

4. The circuit of claim 1, wherein the difference between the intermediate potential and the potential greater than the intermediate potential is more than the difference between the intermediate potential and the potential less than the intermediate potential.

5. The circuit of claim 1, wherein the one or more pairs of first transistors are pMOS transistors, and the one or more pairs of second transistors are nMOS transistors.