SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

• US 20160043231A1
• Filed: 10/22/2015
• Published: 02/11/2016
• Est. Priority Date: 03/11/2011
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: KOEZUKA, Junichi, OHNO, Shinji, SATO, Yuichi, TAKAHASHI, Masahiro, KISHIDA, Hideyuki
• Granted Patent: US 9,450,104 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 29/045 by their particular orientation of crystalline planes
• CPC Class Codes: H01L 29/66969 of devices having semiconductor bodies not comprising group 14 or group 13/15 materials comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials, comprising cuprous oxide or cuprous iodide H01L21/02365
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
• CPC Class Codes: H01L 29/78693 the semiconducting oxide being amorphous
• CPC Class Codes: H01L 29/78696 characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel H01L29/78612 takes precedence; transistors having a drain offset region or a lightly doped drain [LDD] H01L29/78621

Abstract

The semiconductor device includes an oxide semiconductor film having a first region and a pair of second regions facing each other with the first region provided therebetween, a gate insulating film over the oxide semiconductor film, and a first electrode overlapping with the first region, over the gate insulating film. The first region is a non-single-crystal oxide semiconductor region including a c-axis-aligned crystal portion. The pair of second regions is an oxide semiconductor region containing dopant and including a plurality of crystal portions.

Claims

1. A semiconductor device comprising:

an oxide semiconductor film on an insulating surface, the oxide semiconductor film including a first region, a second region, and a third region;

a gate insulating film over the oxide semiconductor film;

a gate electrode over the gate insulating film, the gate electrode overlapping with the first region;

a first electrode electrically connected to the second region; and

a second electrode electrically connected to the third region,

wherein the first region is interposed between the second region and the third region,

wherein, in the first region, c-axes of crystals are aligned substantially perpendicularly to the insulating surface throughout a thickness of the oxide semiconductor film;

wherein each of the second region and the third region is added with an impurity element and comprises a first portion in contact with the insulating surface and a second portion over the first portion,

wherein the second portion has a polycrystalline oxide semiconductor, and

wherein, in the second portion, c-axes of crystals are aligned substantially perpendicularly to the insulating surface.

2. The semiconductor device according to claim 1,

wherein the gate electrode serves as a mask for preventing the impurity element from being contained in the first region.

3. The semiconductor device according to claim 1,

wherein the impurity element is selected from the group consisting of phosphorus, arsenic, antimony, and boron.

4. The semiconductor device according to claim 1,

wherein a concentration of the impurity element of the second region and the third region is higher than or equal to 5×

10¹⁸ cm<sup>−

3</sup> and lower than or equal to 1×

10²² cm<sup>−

3</sup>.