Light Emitting Heterostructure with Partially Relaxed Semiconductor Layer

• US 20160225941A1
• Filed: 04/12/2016
• Published: 08/04/2016
• Est. Priority Date: 01/09/2013
• Status: Active Grant

• Current Assignee: Sensor Electronic Technology Incorporated (Seoul Semiconductor Co., Ltd.)
• Original Assignee: Sensor Electronic Technology Incorporated (Seoul Semiconductor Co., Ltd.)
• Inventors: Shatalov, Maxim S., Dobrinsky, Alexander, Shur, Michael, Gaska, Remigijus
• Granted Patent: US 9,966,496 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: H01L 2933/0033 relating to semiconductor body packages
• CPC Class Codes: H01L 33/0025 comprising only AIIIBV compounds
• CPC Class Codes: H01L 33/007 comprising nitride compounds
• CPC Class Codes: H01L 33/02 characterised by the semiconductor bodies
• CPC Class Codes: H01L 33/12 with a stress relaxation structure, e.g. buffer layer
• CPC Class Codes: H01L 33/14 with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure
• CPC Class Codes: H01L 33/30 containing only elements of Group III and Group V of the Periodic Table
• CPC Class Codes: H01S 2301/173 The laser chip comprising special buffer layers, e.g. dislocation prevention or reduction
• CPC Class Codes: H01S 5/021 Silicon based substrates
• CPC Class Codes: H01S 5/0213 Sapphire, quartz or diamond based substrates
• CPC Class Codes: H01S 5/32341 blue laser based on GaN or GaP

Abstract

A light emitting heterostructure including a partially relaxed semiconductor layer is provided. The partially relaxed semiconductor layer can be included as a sublayer of a contact semiconductor layer of the light emitting heterostructure. A dislocation blocking structure also can be included adjacent to the partially relaxed semiconductor layer.

Claims

1. A heterostructure comprising:

a light generating structure having a first side and a second side;

a n-type contact semiconductor layer located on the first side of the light generating structure; and

a p-type contact semiconductor layer located on the second side of the light generating structure, wherein at least one of the contact semiconductor layers includes an embedded partially relaxed sublayer.

2. The heterostructure of claim 1, wherein the at least one of the contact semiconductor layers further includes a dislocation blocking structure adjacent to a side of the partially relaxed layer.

3. The heterostructure of claim 2, wherein the dislocation blocking structure includes a plurality of tensile sublayers alternating with a plurality of compressive sublayers.

4. The heterostructure of claim 3, wherein the heterostructure is formed of group III-V materials, and wherein the alternating tensile and compressive sublayers have the same effective lattice constant and are formed by varying at least one of:

an aluminum composition or a V/III ratio, of adjacent sublayers in the dislocation blocking structure.

5. The heterostructure of claim 4, wherein the effective lattice constant corresponds to an effective lattice constant of the light generating structure.

6. The heterostructure of claim 1, further comprising:

a substrate transparent to light generated by the light generating structure; and

a buffer layer adjacent to the substrate, wherein at least one of;

the n-type contact semiconductor layer or the p-type contact semiconductor layer is located between the light generating structure and the buffer layer.

7. The heterostructure of claim 1, wherein the partially relaxed sublayer has a lattice mismatch of at least one percent with an immediately adjacent semiconductor layer.

8. The heterostructure of claim 1, wherein the heterostructure is formed of group III-V materials, and wherein the lattice mismatch is obtained by a change in an aluminum molar content of the partially relaxed sublayer.

9. The heterostructure of claim 1, wherein a thickness of the partially relaxed sublayer is greater than a predicted critical thickness corresponding to partial relaxation.

10. The heterostructure of claim 1, further comprising a graded layer located immediately adjacent to one of the first or second sides of the light generating structure.

11. A device comprising:

a mesa structure including;

a light generating structure having a first side and a second side;

a n-type contact semiconductor layer located on the first side of the light generating structure; and

a p-type contact semiconductor layer located on the second side of the light generating structure, wherein at least one of the contact semiconductor layers includes an embedded partially relaxed sublayer.

12. The device of claim 11, further comprising:

a substrate transparent to light generated by the light generating structure; and

a buffer layer adjacent to the substrate, wherein at least one of;

the n-type contact semiconductor layer or the p-type contact semiconductor layer is located between the light generating structure and the buffer layer.

13. The device of claim 11, wherein the at least one of the contact semiconductor layers further includes a dislocation blocking structure adjacent to a side of the partially relaxed layer, and wherein the dislocation blocking structure includes a plurality of tensile sublayers alternating with a plurality of compressive sublayers.

14. The device of claim 13, wherein an effective lattice constant of the dislocation blocking structure corresponds to an effective lattice constant of the light generating structure.

15. The device of claim 11, wherein a thickness of the partially relaxed sublayer is greater than a predicted critical thickness corresponding to partial relaxation.

16. The device of claim 11, further comprising a graded layer located immediately adjacent to one of the first or second sides of the light generating structure.

17. A method comprising:

forming a heterostructure, the heterostructure comprising;

a light generating structure having a first side and a second side;

a n-type contact semiconductor layer located on the first side of the light generating structure; and

a p-type contact semiconductor layer located on the second side of the light generating structure, wherein at least one of the contact semiconductor layers includes an embedded partially relaxed sublayer.

18. The method of claim 17, the heterostructure further including a dislocation blocking structure adjacent to a side of the partially relaxed layer, and wherein the dislocation blocking structure includes a plurality of tensile sublayers alternating with a plurality of compressive sublayers.

19. The method of claim 18, wherein the forming includes configuring the dislocation blocking structure such that an effective lattice constant of the dislocation blocking structure substantially matches an effective lattice constant of the light generating structure.

20. The method of claim 19, wherein the heterostructure is formed of group III-V materials, and wherein the alternating tensile and compressive sublayers have the same effective lattice constant and are formed by varying at least one of:

an aluminum composition or a V/III ratio, of adjacent sublayers in the dislocation blocking structure.