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Light emitting heterostructure with partially relaxed semiconductor layer

DC
  • US 9,966,496 B2
  • Filed: 04/12/2016
  • Issued: 05/08/2018
  • Est. Priority Date: 01/09/2013
  • Status: Active Grant
First Claim
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1. A heterostructure comprising:

  • a substrate;

    a buffer layer adjacent to the substrate;

    a light generating structure having a first side and a second side, wherein the substrate is transparent to light generated by the light generating structure;

    an n-type contact semiconductor layer located on the first side of the light generating structure;

    a p-type contact semiconductor layer located on the second side of the light generating structure, wherein at least one of the contact semiconductor layers includes an embedded partially relaxed sublayer, and wherein at least one of the contact semiconductor layers is located between the light generating structure and the buffer layer; and

    a dislocation blocking structure located between the partially relaxed sublayer and the light generating structure, wherein the dislocation blocking structure includes a graded composition that changes from a first side of the dislocation blocking structure to a second side thereof.

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