3D SEMICONDUCTOR DEVICE AND STRUCTURE
First Claim
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1. A 3D integrated circuit device, comprising:
- a first layer comprising first transistors, overlaid by a second layer comprising second transistors, overlaid by a third layer comprising third transistors,wherein said first layer, said second layer and said third layer are each thinner than 2 microns,wherein said first layer comprises first circuits comprising at least one of said first transistors,wherein said second layer comprises second circuits comprising at least one of said second transistors, andwherein said third layer comprises a charge pump circuit and control circuits to control said first circuits and said second circuits.
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Abstract
A 3D integrated circuit device, including: a first layer including first transistors, overlaid by a second layer including second transistors, overlaid by a third layer including third transistors, where the first layer, the second layer and the third layer are each thinner than 2 microns, where the first layer includes first circuits including at least one of the first transistors, where the second layer includes second circuits including at least one of the second transistors, and where the third layer includes a charge pump circuit and control circuits to control the first circuits and the second circuits
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Citations
20 Claims
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1. A 3D integrated circuit device, comprising:
a first layer comprising first transistors, overlaid by a second layer comprising second transistors, overlaid by a third layer comprising third transistors, wherein said first layer, said second layer and said third layer are each thinner than 2 microns, wherein said first layer comprises first circuits comprising at least one of said first transistors, wherein said second layer comprises second circuits comprising at least one of said second transistors, and wherein said third layer comprises a charge pump circuit and control circuits to control said first circuits and said second circuits. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. A 3D integrated circuit device, comprising:
a first layer comprising first transistors, overlaid by a second layer comprising second transistors, overlaid by a third layer comprising third transistors, wherein said first layer, said second layer and said third layer are each thinner than 2 microns, wherein said first layer comprises first circuits comprising at least one of said first transistors, wherein said second layer comprises second circuits comprising at least one of said second transistors, and wherein said third layer comprises a power regulator circuit and control circuits to control said first circuits and said second circuits. - View Dependent Claims (9, 10, 11, 12, 13, 14)
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15. A 3D integrated circuit device, comprising:
a first layer comprising first transistors, overlaid by a second layer comprising second transistors, overlaid by a third layer comprising third transistors, wherein said first layer, said second layer and said third layer are each thinner than 2 microns, wherein said first layer comprises first circuits comprising at least one of said first transistors, wherein said second layer comprises second circuits comprising at least one of said second transistors, and wherein said third layer comprises a temperature compensated oscillator circuit and control circuits to control said first circuits and said second circuits. - View Dependent Claims (16, 17, 18, 19, 20)
Specification