SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME

• US 20170323957A1
• Filed: 07/21/2017
• Published: 11/09/2017
• Est. Priority Date: 07/31/2008
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: YAMAZAKI, Shunpei, MIYAIRI, Hidekazu, AKIMOTO, Kengo, SHIRAISHI, Kojiro
• Granted Patent: US 10,937,897 B2
• Time in Patent Office: Days
• CPC Class Codes: H01L 21/46 Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/428 manufacture of electrodes thereon H01L21/44
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 29/66969 of devices having semiconductor bodies not comprising group 14 or group 13/15 materials comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials, comprising cuprous oxide or cuprous iodide H01L21/02365
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

Abstract

It is an object to provide a semiconductor device including a thin film transistor with favorable electric properties and high reliability, and a method for manufacturing the semiconductor device with high productivity. In an inverted staggered (bottom gate) thin film transistor, an oxide semiconductor film containing In, Ga, and Zn is used as a semiconductor layer, and a buffer layer formed using a metal oxide layer is provided between the semiconductor layer and a source and drain electrode layers. The metal oxide layer is intentionally provided as the buffer layer between the semiconductor layer and the source and drain electrode layers, whereby ohmic contact is obtained.

Claims

1. (canceled)

2. A semiconductor device comprising:

a thin film transistor comprising;

a gate electrode;

a gate insulating layer over the gate electrode;

an oxide semiconductor layer over the gate insulating layer;

a first metal oxide layer over the oxide semiconductor layer;

a first conductive layer over the first metal oxide layer;

a second metal oxide layer over the oxide semiconductor layer; and

a second conductive layer over the second metal oxide layer; and

an insulating layer over the oxide semiconductor layer, the insulating layer being in contact with a top surface of the oxide semiconductor layer,

wherein a gap between the first metal oxide layer and the second metal oxide layer is smaller than a gap between the first conductive layer and the second conductive layer, and

wherein a top surface of a first portion of the first metal oxide layer is in contact with the first conductive layer, and a top surface and a side surface of an end portion of the first metal oxide layer is not in contact with the first conductive layer.

3. The semiconductor device according to claim 2, further comprising:

a pixel electrode electrically connected to the oxide semiconductor layer through the first metal oxide layer and the first conductive layer or through the second metal oxide layer and the second conductive layer.

4. The semiconductor device according to claim 2, wherein the top surface of the first portion and the top surface of the end portion are at the same level.

5. The semiconductor device according to claim 2, further comprising:

a barrier metal between the gate electrode and a substrate over which the thin film transistor is located,

wherein the barrier metal is capable of preventing diffusion of the gate electrode.

6. A semiconductor device comprising:

a thin film transistor comprising;

a gate electrode;

a gate insulating layer over the gate electrode;

an oxide semiconductor layer over the gate insulating layer;

a first metal oxide layer over the oxide semiconductor layer;

a first conductive layer over the first metal oxide layer;

a second metal oxide layer over the oxide semiconductor layer; and

a second conductive layer over the second metal oxide layer; and

an insulating layer over the oxide semiconductor layer, the first metal oxide layer, the first conductive layer, the second metal oxide layer and the second conductive layer, the insulating layer being in contact with a top surface of the oxide semiconductor layer,

wherein a gap between the first metal oxide layer and the second metal oxide layer is smaller than a gap between the first conductive layer and the second conductive layer,

wherein the gate electrode comprises copper,

wherein the gate insulating layer comprises a first gate insulating layer and a second gate insulating layer over the first gate insulating layer,

wherein the first gate insulating layer is a silicon nitride film or a silicon nitride oxide film, and

wherein a top surface of a first portion of the first metal oxide layer is in contact with the first conductive layer, and a top surface and a side surface of an end portion of the first metal oxide layer is not in contact with the first conductive layer.

7. The semiconductor device according to claim 6, further comprising:

a pixel electrode electrically connected to the oxide semiconductor layer through the first metal oxide layer and the first conductive layer or through the second metal oxide layer and the second conductive layer.

8. The semiconductor device according to claim 6, wherein the first gate insulating layer is the silicon nitride oxide film, and the silicon nitride oxide film comprises more nitrogen than oxygen.

9. The semiconductor device according to claim 6, further comprising:

a pixel electrode electrically connected to the oxide semiconductor layer through the first metal oxide layer and the first conductive layer or through the second metal oxide layer and the second conductive layer.

10. The semiconductor device according to claim 6, wherein the top surface of the first portion and the top surface of the end portion are at the same level.

11. The semiconductor device according to claim 6, further comprising:

a barrier metal between the gate electrode and a substrate over which the thin film transistor is located,

wherein the barrier metal is capable of preventing diffusion of the gate electrode.

12. A semiconductor device comprising:

a thin film transistor comprising;

a gate electrode;

a gate insulating layer over the gate electrode;

an oxide semiconductor layer over the gate insulating layer;

a first conductive layer over the oxide semiconductor layer;

a second conductive layer over the first conductive layer;

a third conductive layer over the second conductive layer;

a fourth conductive layer over the oxide semiconductor layer;

a fifth conductive layer over the fourth conductive layer; and

a sixth conductive layer over the fifth conductive layer; and

an insulating layer over the oxide semiconductor layer, the insulating layer being in contact with a top surface of the oxide semiconductor layer,

wherein a gap between the first conductive layer and the fourth conductive layer is smaller than a gap between the second conductive layer and the fifth conductive layer,

wherein the gap between the first conductive layer and the fourth conductive layer is smaller than a gap between the third conductive layer and the sixth conductive layer, and

wherein a top surface of a first portion of the first conductive layer is in contact with the second conductive layer, and a top surface and a side surface of an end portion of the first conductive layer is not in contact with the second conductive layer.

14. The semiconductor device according to claim 12, wherein the gate electrode comprises copper.

22. The semiconductor device according to claim 12, wherein the top surface of the first portion and the top surface of the end portion are at the same level.

13. The semiconductor device according to claim 12, further comprising:

a pixel electrode electrically connected to the oxide semiconductor layer through the first conductive layer, the second conductive layer and the third conductive layer or through the fourth conductive layer, the fifth conductive layer and the sixth conductive layer.

13-1. (canceled)

15. A semiconductor device comprising:

a thin film transistor comprising;

a gate electrode;

a gate insulating layer over the gate electrode;

an oxide semiconductor layer over the gate insulating layer;

a first layered structure electrically connected to the oxide semiconductor layer; and

a second layered structure electrically connected to the oxide semiconductor layer; and

an insulating layer over the oxide semiconductor layer, the first layered structure and the second layered structure, the insulating layer being in contact with a top surface of the oxide semiconductor layer,

wherein the first layered structure comprises;

a first conductive layer over the oxide semiconductor layer;

a second conductive layer over the first conductive layer; and

a third conductive layer over the second conductive layer,

wherein the second layered structure comprises;

a fourth conductive layer over the oxide semiconductor layer;

a fifth conductive layer over the fourth conductive layer; and

a sixth conductive layer over the fifth conductive layer,

wherein a gap between the first conductive layer and the fourth conductive layer is smaller than a gap between the second conductive layer and the fifth conductive layer,

wherein the gap between the first conductive layer and the fourth conductive layer is smaller than a gap between the third conductive layer and the sixth conductive layer,

wherein the first layered structure comprises copper,

wherein the second layered structure comprises copper,

wherein the gate insulating layer comprises a first gate insulating layer and a second gate insulating layer over the first gate insulating layer,

wherein the first gate insulating layer is a silicon nitride film or a silicon nitride oxide film, and

wherein a top surface of a first portion of the first conductive layer is in contact with the second conductive layer, and a top surface and a side surface of an end portion of the first conductive layer is not in contact with the second conductive layer.

16. The semiconductor device according to claim 15, further comprising:

a pixel electrode electrically connected to the oxide semiconductor layer through the first conductive layer, the second conductive layer and the third conductive layer or through the fourth conductive layer, the fifth conductive layer and the sixth conductive layer.

17. The semiconductor device according to claim 15, wherein the first gate insulating layer is the silicon nitride oxide film, and the silicon nitride oxide film comprises more nitrogen than oxygen.

18. The semiconductor device according to claim 15, wherein the top surface of the first portion and the top surface of the end portion are at the same level.

19. The semiconductor device according to claim 15, wherein the gate electrode comprises copper.

20. The semiconductor device according to claim 19, further comprising:

a barrier metal between the gate electrode and a substrate over which the thin film transistor is located,

wherein the barrier metal is capable of preventing diffusion of the gate electrode.

21. The semiconductor device according to claim 20, wherein the barrier metal is a nitride film of one selected from the group consisting of titanium, molybdenum, chromium, tantalum, tungsten, and aluminum.