Diode connected to a magnetic tunnel junction and self aligned with a metallic conductor and method of forming the same

• US 6,562,634 B2
• Filed: 03/20/2001
• Issued: 05/13/2003
• Est. Priority Date: 08/31/1998
• Status: Expired due to Term

• Current Assignee: GlobalFoundries, Inc.
• Original Assignee: International Business Machines Corporation
• Inventors: Bronner, Gary Bela, Gates, Stephen McConnell, Scheuerlein, Roy Edwin
• Primary Examiner(s): COLEMAN, WILLIAM D
• Application Number:
  US09/811,759
• Publication Number:
  US 20010010938A1
• Time in Patent Office: 784 Days
• Field of Search: 365/171, 365/173, 365/158, 428/693, 428/3, 257/295, 438/247, 438/3
• US Class Current: 438/3
• CPC Class Codes: B82Y 10/00 Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
• CPC Class Codes: H10B 61/10 comprising components having two electrodes, e.g. diodes or MIM elements

Abstract

A magneto-resistive memory cell and a method of forming the memory cell, includes a substrate, a single crystalline semiconductor diode formed in the substrate; and a first thin film conductor recessed in the substrate, and a second thin film conductor formed above a magnetic tunnel junction formed on the diode. The diode and the first thin film conductor share a non-planar common surface, such that the metal tunnel junction is a predetermined distance from the thin film conductor.

Claims

1. A method for forming a memory cell, comprising:

depositing a silicon nitride layer onto a wafer substrate;

forming a trench in said substrate;

lining said trench with a layer of As-doped glass;

etching to remove the As-doped glass except in a cell location depositing a sacrificial oxide conformally over the entire wafer;

performing solid source diffusion including heating to diffuse As into the substrate;

stripping said sacrificial oxide and the As-doped glass;

lining the trenches with a conformal oxide trench liner;

lithographically patterning and forming a window at the cell location, said window being formed in the oxide trench liner on the bottom surface region of the trench, and removing said conformal oxide trench liner, thereby exposing the substrate;

forming an n-type region in the substrate at the window, and forming p-type region in the substrate at the window, said p-type region being relatively shallower than said n-type region;

filling said trench with first metal line conductor metal, and planarizing said first metal line conductor;

recessing said metal into the trench by selective reactive ion etching (RIE);

filling upper regions of the trench with an oxide; and

planarizing said oxide to the substrate surface.

2. The method according to claim 1, wherein said substrate comprises a silicon substrate, and said trenches are formed to have an approximately 1:

1.5 aspect ratio, and wherein a process of forming the conducting strap regions comprises;

lithographically defining a location of the strap, said lithographically defining determining a cell node on which a magnetic tunnel junction is formed;

removing the conformal oxide trench liner on one sidewall of the trench, and leaving the liner on an opposite sidewall;

reactive ion etching (RIE) both the oxide and the conformal oxide trench liner on one side only of the trench, thereby forming recessed regions in the oxide, the recessed region being located over the window;

depositing one of a metal and a doped polysilicon to fill the recessed regions, thereby forming the strap, said strap making ohmic contact to the n-type regions on the sidewall of the recessed regions;

planarizing said strap material to the surface of the substrate;

forming and patterning said magnetic tunnel junction, depositing an inter-layer dielectric (ILD), planarizing said ILD to the top surface of the magnetic tunnel junction, and forming second metal lines, said second metal lines comprising column lines, to form said memory cell.

3. The method according to claim 1, wherein said planarizing of said strap material comprises planarizing said strap material by chemical mechanical polishing (CMP).