Integrated cooling substrate for extreme ultraviolet reticle

• US 6,806,006 B2
• Filed: 07/15/2002
• Issued: 10/19/2004
• Est. Priority Date: 07/15/2002
• Status: Expired due to Fees

• Current Assignee: International Business Machines Corporation, Phototronics Incorporated
• Original Assignee: International Business Machines Corporation, Phototronics Incorporated
• Inventors: Lercel, Michael J., Mathur, Dhirendra Prasad
• Primary Examiner(s): ROSASCO, STEPHEN D
• Application Number:
  US10/064,441
• Publication Number:
  US 20040009410A1
• Time in Patent Office: 827 Days
• Field of Search: 430/5, 62/32, 378/35
• US Class Current: 430/5
• CPC Class Codes: B82Y 10/00 Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
• CPC Class Codes: B82Y 40/00 Manufacture or treatment of nanostructures
• CPC Class Codes: G03F 1/24 Reflection masks; Preparation thereof
• CPC Class Codes: G03F 1/38 Masks having auxiliary features, e.g. special coatings or marks for alignment or testing; Preparation thereof
• CPC Class Codes: G03F 7/70875 Temperature, e.g. temperature control of masks or workpieces via control of stage temperature
• CPC Class Codes: G21K 1/062 Devices having a multilayer structure
• CPC Class Codes: G21K 2201/065 provided with cooling means
• CPC Class Codes: Y10T 428/1317 Multilayer [continuous layer]

Abstract

The current invention provides a method and apparatus that minimizes the destructive effects of non-reflected energy during lithography. More specifically, a cooling system is located within the mask. In one example, a cooling module is integrated into the EUV mask. The cooling module may be thermoelectric. The EUV mask comprises a substrate structure as a base for a reticle, a cooling layer, which is formed on the substrate structure and a planarizing layer deposited on the cooling layer. In another example, a cooling channel is formed within the mask.

Claims

1. A mask, wherein said mask comprises:

a substrate;

a cooling layer on said substrate;

a planarizing layer on said cooling layer; and

a mask absorber above said planarizing layer,

wherein said substrate, said cooling layer, said planarizing layer, and said mask absorber comprise an integrated structure.

2. The mask of claim 1, wherein said substrate structure material comprises a coefficient of thermal expansion less than 1 parts per billion per degree Celsius.

3. The mask of claim 1, wherein said substrate structure material comprises a coefficient of thermal expansion between the range of 1 parts per million per degree Celsius and 5 parts per billion per degree Celsius.

4. The mask of claim 1, wherein said mask comprises an extreme ultraviolet mask.

5. The mask of claim 4, wherein said semiconductor pellets comprise p-type pellets and n-type pellets.

6. The mask of claim 1, wherein said cooling layer comprises a thermoelectric module.

7. The mask of claim 1, wherein said cooling layer comprises semiconductor pellets.

8. The mask of claim 1, wherein said cooling layer comprises a thermoelectric cooler.

9. The mask of claim 1, wherein said planarizing layer has height variations not exceeding 50 nm.

10. The mask of claim 1, where said planarizing layer supports an extreme ultraviolet multilayer reflector.

11. The mask of claim 1, where said planarizing layer supports said mask absorber.

12. A mask blank comprising:

a substrate having at least one cooling channel;

a cooling fluid within said cooling channel; and

a mask absorber above said substrate,

wherein said substrate, said cooling channel, and said mask absorber comprise an integrated structure.

13. The mask blank of claim 12, wherein said cooling fluid comprises water.

14. The mask blank of claim 12, wherein said substrate comprises a low expansion ceramic.

15. The mask blank of claim 12, wherein said cooling channel has a cross section diameter of less than approximately 1 micron.

16. The mask blank of claim 12, wherein said cooling channel has a cross section diameter of up to approximately 1 mm.

17. The mask blank of claim 12, further comprising a cover material covering said cooling channel.

18. A method of making a mask blank, said method comprising:

forming at least one cooling channel in a mask substrate;

enclosing said channels with a cover material; and

forming a mask absorber above said mask substrate layer,

wherein said forming of said substrate, said cooling channel, and said mask absorber forms an integrated structure.

19. The method of claim 18, wherein said forming of said cooling channel comprises direct machining of said mask substrate.

20. The method of claim 18, wherein said forming of said cooling channel comprises sintering said mask substrate.