Method of forming schottky diode with charge balance structure

• US 7,429,523 B2
• Filed: 03/17/2006
• Issued: 09/30/2008
• Est. Priority Date: 10/17/2001
• Status: Expired due to Term

• Current Assignee: Semiconductor Components Industries LLC (ON Semiconductor Corporation)
• Original Assignee: Fairchild Semiconductor Corporation (ON Semiconductor Corporation)
• Inventors: Kocon, Christopher Boguslaw
• Primary Examiner(s): WOJCIECHOWICZ, EDWARD JOSEPH
• Application Number:
  US11/378,087
• Publication Number:
  US 20060166473A1
• Time in Patent Office: 928 Days
• Field of Search: 438/212, 438/268, 438/570, 438/576, 257/328, 257/476
• US Class Current: 438/570
• CPC Class Codes: H01L 29/0653 adjoining the input or output region of a field-effect device, e.g. the source or drain region
• CPC Class Codes: H01L 29/0692 Surface layout
• CPC Class Codes: H01L 29/404 Multiple field plate structures
• CPC Class Codes: H01L 29/407 Recessed field plates, e.g. trench field plates, buried field plates
• CPC Class Codes: H01L 29/66143 Schottky diodes
• CPC Class Codes: H01L 29/861 Diodes
• CPC Class Codes: H01L 29/872 Schottky diodes

Abstract

a Schottky diode having a semiconductor region is formed as follows. A plurality of charge control electrodes are formed in the semiconductor region so as to influence an electric field in the semiconductor region, wherein at least two of the charge control electrodes are adapted to be biased differently from one another. The semiconductor region is overlaid with a metal layer to thereby form a Schottky barrier therebetween.

Claims

1. A method for forming a Schottky diode having a semiconductor region, the method comprising:

forming a plurality of charge control electrodes in the semiconductor region, wherein at least two of the charge control electrodes are adapted to be biased differently from one another; and

overlaying the semiconductor region with a metal layer to thereby form a Schottky barrier therebetween, the metal layer being insulated from at least one of the plurality of charge control electrodes, wherein the plurality of charge control electrodes are below the Schottky barrier so as to influence an electric field in the semiconductor region to improve a breakdown voltage of the Schottky diode.

2. The method of claim 1 further comprising forming a plurality of trenches in the semiconductor region, and wherein the step of forming a plurality of charge control electrodes comprises:

lining each of the plurality of trenches with an insulating layer;

depositing a first conductive material in each trench and then etching the first deposited conductive material to form a first charge control electrode in each trench;

forming a first insulating layer over each of the first charge control electrodes;

depositing a second conductive material in each trench and then etching the second deposited conductive material to form a second charge control electrode in each trench over the first insulating layer.

3. The method of claim 1 further comprising:

forming a plurality of trenches extending into the semiconductor region, the plurality of charge control electrodes being formed in the plurality of trenches; and

forming a plurality of shallow regions in a top surface region of the semiconductor region between adjacent pairs of the plurality of trenches such that the metal layer is in direct contact with the shallow regions, the shallow regions having the same conductivity type as but a lower doping concentration than that of the semiconductor region.

4. The method of claim 3 further comprising forming the plurality of charge control electrodes in the plurality of trenches such that the plurality of charge control electrodes are insulated from one another and from the semiconductor region.

5. The method of claim 3 wherein the semiconductor region and the shallow layer are n-type.

6. The method of claim 1 wherein the method further comprises forming a plurality of biasing elements on or in the semiconductor region, wherein the biasing elements are adapted to bias the at least two charge control electrodes at different voltages.

7. The method of claim 1 wherein the first and second charge control electrodes comprise polysilicon.

8. A method of forming a Schottky diode, comprising:

forming a first trench extending in a semiconductor region; and

forming at least one diode in the first trench; and

overlaying the semiconductor region with a metal layer to thereby form a Schottky barrier therebetween, the metal layer also extending over the first trench, wherein no current flows through the first trench when the Schottky diode is in a conducting state, and wherein the at least one diode influences an electric field in the semiconductor region to thereby increase a blocking voltage of the Schottky diode.

9. The method of claim 8 further comprising:

forming an insulating layer which extends along sidewalls of the first trench but is discontinuous along the bottom of the first trench.

10. The method of claim 8 further comprising:

forming an insulating layer configured to insulate the at least one diode from the semiconductor region along the sidewalls of the first trench.

11. The method of claim 8 wherein the semiconductor region is an epitaxial layer, the method further comprising:

forming the epitaxial layer over and in contact with a substrate, the epitaxial layer being of the same conductivity type as the substrate.

12. The method of claim 8 wherein the at least one diode is arranged in the first trench so that when the Schottky diode is biased in a blocking state an electric field induced in the at least one diode influences an electric field in the semiconductor region to thereby increase the blocking voltage of the Schottky diode.

13. The Schottky diode of claim 8 wherein the at least one diode is arranged in the first trench so that when the Schottky diode is biased in a blocking state an electric field induced in the at least one diode results in a more uniform charge distribution in the semiconductor region.

14. The method of claim 8 wherein the step of forming at least one diode comprises forming n-type and p-type regions alternately stacked on top of one another in the first trench.

15. The method of claim 8 further comprising:

forming a plurality of shallow regions in a top surface region of the semiconductor region between adjacent pairs of the plurality of trenches such that the metal layer is in direct contact with the shallow regions to form a Schottky barrier therebetween, the shallow layer having the same conductivity type as but a lower doping concentration than that of the semiconductor region.

16. The method of claim 15 wherein the semiconductor region and the shallow layer are n-type.

17. The method of claim 8 wherein the at least one diode is from one of doped silicon material and doped polysilicon material.

18. A method of forming a Schottky diode, comprising:

forming a plurality of laterally spaced trenches in a semiconductor region, each trench extending through at least a portion of the semiconductor region;

forming a plurality of diodes in each of the plurality of trenches; and

overlaying the semiconductor region with a metal layer so as to form a Schottky barrier therebetween, the metal layer extending over the plurality of laterally spaced trenches, wherein no current flows through the plurality of laterally spaced trenches when the Schottky diode is in a conducting state, and wherein the plurality of diodes influence an electric field in the semiconductor region to thereby increase a blocking voltage of the Schottky diode.

19. The method of claim 18 wherein the plurality of diodes are formed in each of the plurality of trenches such that an electric field induced in one or more of the plurality of diodes influences an electric field in the semiconductor region such that a blocking voltage of the Schottky diode is increased.

20. The method of claim 18 further comprising:

forming an insulating layer in each of the plurality of trenches, the insulating layer extending along the trench sidewalls but being discontinuous along the bottom of the trench.

21. The method of claim 18 further comprising:

forming at least two terminals located along opposite surfaces of the Schottky diode, the plurality of trenches extending vertically between the two terminals,

wherein the step of forming a plurality of diodes comprises forming p-type and n-type regions alternately stacked on top of each other in each trench.

22. The method of claim 18 further comprising:

before forming the plurality of trenches, forming a shallow layer along an upper surface of the semiconductor region, the shallow layer having the same conductivity type as but a lower doping concentration than that of the semiconductor region, the plurality of trenches extending through the shallow layer and into the semiconductor region such that the shallow layer is broken up into a plurality of shallow regions between adjacent trenches, wherein the metal layer is in direct contact with the plurality of shallow regions to form a Schottky barrier therebetween.