Systems and methods for providing performance monitoring in a memory system

• US 7,493,439 B2
• Filed: 08/01/2006
• Issued: 02/17/2009
• Est. Priority Date: 08/01/2006
• Status: Active Grant

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Gower, Kevin C., VanStee, Dustin J., Love, Carl E.
• Primary Examiner(s): Dang; Khanh
• Assistant Examiner(s): DALEY, CHRISTOPHER ANTHONY
• Application Number:
  US11/461,567
• Publication Number:
  US 20080034148A1
• Time in Patent Office: 931 Days
• Field of Search: 710/305, 711/154
• US Class Current: 710/305
• CPC Class Codes: G06F 11/3419 by assessing time
• CPC Class Codes: G06F 11/3476 Data logging G06F11/14, G06F11/2205 take precedence
• CPC Class Codes: G06F 11/349 for interfaces, buses
• CPC Class Codes: G06F 13/1668 Details of memory controller
• CPC Class Codes: G06F 2201/86 Event-based monitoring
• CPC Class Codes: G06F 2201/88 Monitoring involving counting
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

Systems and methods for providing performance monitoring in a memory system. Embodiments include a memory system for storing and retrieving data for a processing system. The memory system includes a memory controller, a plurality of memory devices, a memory bus and a memory hub device. The memory controller receives and responds to memory access requests. The memory bus is in communication with the memory controller. The memory hub device is in communication with the memory bus. The memory hub device includes a memory interface for transferring one or more of address, control and data information between the memory hub device and the memory controller via the memory bus. The memory hub device also includes a memory device interface for communicating with the memory devices. The memory hub device further includes a performance monitor for monitoring and reporting one or more of memory bus utilization, memory device utilization, and performance characteristics over defined intervals during system operation.

Claims

1. A method of providing performance monitoring, the method comprising:

detecting the occurrence of selected bus conditions that occur within a hub device over time, the conditions characterized by type and the hub device in a cascade interconnect memory system;

recording the number of detected events of each type in event counters, the recording performed by a performance monitor integrated within the hub device;

recording the event counters and running sum values for each type in event frequency arrays along with the amount of time the event counters were active, wherein the event counters are selectively logged into the event frequency array based on two or more selectable conditions including after a programmed amount of time and an event counter reaching a threshold;

sampling input addresses and a command stream received at the hub device using one or more a trace arrays, the command stream including one or more commands having indeterminate response times and including tag information for correlating a memory access request in the command to a memory access response to the command;

recording one or more of the input addresses and the command stream;

stopping the recording of the one or more of the input addresses and the command stream in response to receiving a stop trace signal;

recording performance information for the commands having indeterminate data response times; and

reporting the performance information for the commands having indeterminate data response times.

2. The method of claim 1 wherein the recording of the one or more of the input addresses and the command stream is stopped when a pre-selected counter value is exceeded, thereby stopping the trace array upon indication of an unexpected event occurring.

3. The method of claim 1 further comprising outputting contents of the event frequency arrays.

4. The method of claim 1 further comprising generating utilization statistics and performance characteristics in response to contents of the event frequency arrays.

5. The method of claim 1 further comprising outputting the contents of the one or more trace arrays.