Circuit, system, and method for multiplexing signals with reduced jitter

  • US 7,609,799 B2
  • Filed: 08/29/2006
  • Issued: 10/27/2009
  • Est. Priority Date: 09/02/2005
  • Status: Active Grant
First Claim
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1. A circuit comprising:

  • a first logic gate arranged within a first power supply domain and coupled for receiving a first signal;

    a second logic gate arranged within a second power supply domain and coupled for receiving a second signal;

    a logic block arranged within a third power supply domain and coupled for supplying a control signal to the first and second logic gates for deactivating one of the first and second signals; and

    a third logic gate arranged within a fourth power supply domain and coupled to outputs of the first and second logic gates for transmitting either the first signal or the second signal, whichever has not been deactivated by the logic block.

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