Demodulator, chip and method for digitally demodulating an FSK signal
First Claim
1. A high data rate wireless receiver for an FSK data transceiver system having a data transfer protocol, and a carrier signal having a pair of carrier frequencies, the receiver having a signal path and including a digital FSK demodulator for demodulating an FSK signal by measuring the period of incoming carrier signal cycles using a high frequency local clock time-base, fTB, the FSK demodulator demodulating the FSK signal having a data rate from the carrier signal, the digital FSK demodulator generating a serial data bit stream based on the FSK carrier signal and generating a synchronized constant frequency clock signal from the carrier frequencies based on the data transfer protocol for sampling the serial data bit stream wherein the frequency of the local clock time-base is substantially higher than the carrier frequencies to digitally measure periods of each received half cycle of the FSK carrier signal wherein the demodulator discriminates between carrier frequencies regardless of data rate and wherein the data transfer protocol, the FSK demodulator and the receiver are all fully digital without the need for analogue circuits in the signal path of the receiver to make the system small, low power and robust.
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Abstract
A demodulator, chip and method for digitally demodulating an FSK signal utilizing a digital data transfer protocol and a digital demodulator circuit have been developed. The data-rate approaches the carrier-frequency. The one application for this technique is in the magnetically powered wireless systems such as biomedical implants and radio frequency identification (RFID) tags with high data rates above 1 Mbps. The demodulator circuit extracts the serial data bit-stream and a constant-frequency clock from an FSK carrier signal in the 1˜20 MHZ range, which can power the wireless system as well. The digital demodulator circuit is implemented entirely with digital circuitry and is called a digital-FSK (DFSK) demodulator.
79 Citations
20 Claims
- 1. A high data rate wireless receiver for an FSK data transceiver system having a data transfer protocol, and a carrier signal having a pair of carrier frequencies, the receiver having a signal path and including a digital FSK demodulator for demodulating an FSK signal by measuring the period of incoming carrier signal cycles using a high frequency local clock time-base, fTB, the FSK demodulator demodulating the FSK signal having a data rate from the carrier signal, the digital FSK demodulator generating a serial data bit stream based on the FSK carrier signal and generating a synchronized constant frequency clock signal from the carrier frequencies based on the data transfer protocol for sampling the serial data bit stream wherein the frequency of the local clock time-base is substantially higher than the carrier frequencies to digitally measure periods of each received half cycle of the FSK carrier signal wherein the demodulator discriminates between carrier frequencies regardless of data rate and wherein the data transfer protocol, the FSK demodulator and the receiver are all fully digital without the need for analogue circuits in the signal path of the receiver to make the system small, low power and robust.
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11. A chip for an FSK data transceiver system having a fully digital data transfer protocol and a carrier signal having a pair of carrier frequencies, the chip comprising:
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a substrate; and a receiver having a signal path and including a digital FSK demodulator formed on the substrate for demodulating an FSK signal by measuring the period of incoming carrier signal cycles using a high frequency local time-base fTB, the FSK demodulator demodulating the FSK signal having a data rate from the carrier signal wherein the receiver generates a serial data bit stream based on the received FSK carrier signal and generates a synchronized constant frequency clock signal from the carrier frequencies based on the data transfer protocol for sampling the serial data bit stream wherein the frequency of the local clock time-base is substantially higher than the carrier frequencies to digitally measure periods of each received half cycle of the FSK carrier signal wherein the demodulator discriminates between carrier frequencies regardless of data rate and wherein the receiver is fully digital without the need for analogue circuits in the signal path of the receiver to minimize the power consumption and the amount of surface area occupied by the demodulator on the substrate and to make the system robust. - View Dependent Claims (12, 13, 14, 15, 16, 17, 18, 19)
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20. A method for receiving and demodulating an FSK signal having a data rate from a carrier signal having a pair of carrier frequencies in an FSK transceiver system having a receiver signal path, the system having a digital data transfer protocol, the method comprising:
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digitally measuring the period of each received positive half cycle of the FSK carrier signal using a high frequency local clock time-base, fTB to obtain a series of pulses which distinguish between long and short FSK carrier cycles; digitally generating a serial data bit stream based on the FSK carrier signal and the series of pulses; and digitally generating a synchronized constant frequency clock signal from the carrier frequencies based on the digital data transfer protocol and the series of pulses wherein the frequency of the local clock time-base is substantially higher than the carrier frequencies to digitally measure periods of each received half cycle of the FSK carrier signal wherein the demodulator discriminates between carrier frequencies regardless of data rate and wherein the method is performed in a fully digital fashion without the need to perform any steps in the signal path in an analogue fashion to make the system small, low power and robust.
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Specification