Organic inverter including surface-treated layer and method of manufacturing the same

• US 8,039,295 B2
• Filed: 10/18/2010
• Issued: 10/18/2011
• Est. Priority Date: 12/07/2006
• Status: Expired due to Fees

• Current Assignee: Electronics and Telecommunications Research Institute
• Original Assignee: Electronics and Telecommunications Research Institute
• Inventors: Koo, Jae Bon, Kim, Seong Hyun, Suh, Kyung Soo
• Primary Examiner(s): Nguyen; Ha Tran T
• Assistant Examiner(s): Sengdara; Vongsavanh
• Application Number:
  US12/906,457
• Publication Number:
  US 20110033971A1
• Time in Patent Office: 365 Days
• Field of Search: None
• US Class Current: 438/99
• CPC Class Codes: H10K 10/466 Lateral bottom-gate IGFETs comprising only a single gate
• CPC Class Codes: H10K 19/10 comprising field-effect transistors

Abstract

An organic inverter and a method of manufacturing the same are provided, which regulates threshold voltages depending on positions when an inverter circuit is manufactured on a substrate using an organic semiconductor. To form a depletion load transistor and an enhancement driver transistor at adjacent positions of the same substrate, the surface of the substrate is selectively treated by positions or selectively applied by self-assembly monolayer treatment. Thus, a D-inverter having a combination of a depletion mode and an enhancement mode is more easily realized than a conventional method using a transistor size effect. Also, the D-inverter can be realized even with the same W/L ratio, thereby increasing integration density. That is, the W/L ratio does not need to be increased to manufacture a depletion load transistor, thereby improving integration density.

Claims

1. A method of manufacturing an organic inverter, comprising the steps of:

forming a driver transistor including a gate electrode, a driver insulating layer, a source electrode, and a drain electrode on a substrate;

forming a load transistor including a gate electrode, a load insulating layer, a source electrode, and a drain electrode on the substrate;

surface-treating one of the driver insulating layer or the load insulating layer; and

forming organic semiconductor layers on the surface-treated insulating layer and the non-surface-treated insulating layer among the load insulating layer and the driver insulating layer,

wherein the load transistor and the driver transistor are formed such that the drain electrode of the driver transistor is directly connected to the gate electrode of the load transistor.

2. The method according to claim 1, wherein the surface treatment is performed using a selective mask to selectively treat only the load insulating layer by UV-ozone treatment, O2 plasma treatment, or laser irradiation.

3. The method according to claim 1, wherein the surface treatment further comprises the steps of:

applying OTS or HMDS onto the entire surface of the substrate to selectively treat the surface of the driver insulating layer with OTS or HMDS; and

removing the OTS or HMDS applied onto the surface of the substrate using a selective surface treatment mask by UV-ozone treatment, O2 plasma treatment or laser irradiation.

4. The method according to claim 1, wherein the surface treatment is performed using a printing technique to selectively treat the surface of the driver insulating layer with OTS or HMDS.

5. The method according to claim 1, wherein the surface-treating of only one of the driver insulating layer or the load insulating layer is conducted such that the load transistor is a depletion-type transistor and the driver transistor is an enhancement-type transistor.

6. The method according to claim 1, wherein the load transistor and the driver transistor are formed such that the driver transistor and the load transistor have substantially the same W/L ratio.

7. A method of manufacturing an organic inverter, comprising the steps of:

forming a driver transistor including a gate electrode, a driver insulating layer, a source electrode, and a drain electrode on a substrate;

forming a load transistor including a gate electrode, a load insulating layer, a source electrode, and a drain electrode on the substrate;

surface-treating one of the driver insulating layer or the load insulating layer, such that the load transistor is a depletion-type transistor and the driver transistor is an enhancement-type transistor; and

forming organic semiconductor layers on the surface-treated insulating layer and the non-surface-treated insulating layer among the load insulating layer and the driver insulating layer,

wherein the load transistor and the driver transistor are formed such that the drain electrode of the driver transistor is directly connected to the gate electrode of the load transistor, and the load transistor and the driver transistor have substantially the same W/L ratio.

8. The method according to claim 7, wherein the surface treatment is performed using a selective mask to selectively treat only the load insulating layer by UV-ozone treatment, O2 plasma treatment, or laser irradiation.

9. The method according to claim 7, wherein the surface treatment further comprises the steps of:

applying OTS or HMDS onto the entire surface of the substrate to selectively treat the surface of the driver insulating layer with OTS or HMDS; and

removing the OTS or HMDS applied onto the surface of the substrate using a selective surface treatment mask by UV-ozone treatment, O2 plasma treatment or laser irradiation.

10. The method according to claim 7, wherein the surface treatment is performed using a printing technique to selectively treat the surface of the driver insulating layer with OTS or HMDS.