Semiconductor device and method of manufacturing the same

• US 8,274,166 B2
• Filed: 07/07/2009
• Issued: 09/25/2012
• Est. Priority Date: 07/09/2008
• Status: Active Grant

• Current Assignee: Renesas Electronics Corporation
• Original Assignee: Renesas Electronics Corporation
• Inventors: Shimada, Hirokazu
• Primary Examiner(s): Mitchell, James
• Application Number:
  US12/458,278
• Publication Number:
  US 20100007035A1
• Time in Patent Office: 1,176 Days
• Field of Search: 257/758, 257/760, 257/797
• US Class Current: 257/797
• CPC Class Codes: H01L 2223/5442 comprising non digital, non alphanumeric information, e.g. symbols
• CPC Class Codes: H01L 2223/54426 for alignment
• CPC Class Codes: H01L 23/3192 Multilayer coating
• CPC Class Codes: H01L 23/544 Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps test patterns for characterising or monitoring manufacturing processes H01L22/00
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

A semiconductor device includes a substrate; an alignment mark formed on the substrate and composed of a metal film; a cover insulating film formed on the alignment mark and covering an entire surface of the alignment mark; and a polyimide film formed on the cover insulating film, and having an opening, which is opened on the alignment mark and has an end face aligning with an end face of the alignment mark, in plan view.

Claims

1. A semiconductor device, comprising:

a substrate;

an alignment mark disposed on said substrate, said alignment mark comprising a metal film;

a cover insulating film disposed on said alignment mark, said cover insulating film covering an entire surface of said alignment mark;

a pad electrode disposed in a same layer as said alignment mark on said substrate; and

a polyimide film disposed on said cover insulating film,

wherein said polyimide film comprises;

a first opening, which is opened on said alignment mark, said first opening comprising an end face aligning flushly with an end face of said alignment mark, in plan view; and

a second opening that is disposed in a region where said pad electrode is disposed and exposes a top surface of said pad electrode, and

wherein said cover insulating film comprises an opening that is disposed in the region where said pad electrode is disposed and exposes the top surface of said pad electrode.

2. The semiconductor device according to claim 1, wherein said cover insulating film is disposed to extend to reach an outer circumference over said end face of said alignment mark.

3. The semiconductor device according to claim 1, wherein the first opening in the polyimide film further comprises a second end face aligning with a second end face of the alignment mark, in plan view.

4. The semiconductor device according to claim 1, wherein the alignment mark further comprises a wiring film disposed on the metal film.

5. The semiconductor device according to claim 1, wherein the pad electrode comprises a second metal film and a wiring film disposed on the second metal film.

6. The semiconductor device according to claim 1, wherein the polyimide film has a first contrast and the alignment mark has a second contrast, and the first and second contrasts overlap, in a top-down view.

7. The semiconductor device according to claim 1, wherein the top surface of the pad electrode comprises a second metal film.

8. The semiconductor device according to claim 7, wherein the second metal film of the pad electrode comprises a portion having a thickness that is less than a thickness of the metal film of the alignment mark.

9. The semiconductor device according to claim 1, wherein the pad electrode is disposed directly on the substrate.

10. The semiconductor device according to claim 1, wherein the alignment mark is disposed directly on the substrate.

11. The semiconductor device according to claim 1, wherein the opening in the cover insulating film partially overlaps the top surface of the pad electrode.

12. The semiconductor according to claim 11, wherein the top surface of the pad electrode, which is exposed by the opening in the cover insulating film, has a thickness that is less than a thickness of the top surface of the pad electrode that is partially overlapped by the cover insulating film.

13. The semiconductor according to claim 1, wherein the alignment mark further comprises a second metal film and a wiring film.

14. The semiconductor according to claim 13, wherein the wiring film is disposed between the metal film and the second metal film.

15. A semiconductor device, comprising:

a substrate;

an alignment mark disposed on said substrate comprising;

a metal film;

a cover insulating film disposed on said alignment mark, said cover insulating film covering an entire surface of said alignment mark;

a pad electrode disposed in a same layer as said alignment mark on said substrate; and

a polyimide film disposed on said cover insulating film, said polyimide film comprising;

an opening, which is opened on said alignment mark, said opening comprising an end face aligning flushly with an end face of said alignment mark, in plan view; and

an opening that is disposed also in a region where said pad electrode is disposed and exposes a top surface of said pad electrode,

wherein said cover insulating film comprises an opening that is disposed also in a region where said pad electrode is disposed and exposes the top surface of said pad electrode, and

wherein each of said alignment mark and said pad electrode includes a wiring film and a barrier metal film disposed on the wiring film, and said barrier metal film of said pad electrode, in a portion that is exposed from said cover insulating film, has a film thickness smaller than that of said barrier metal film of said alignment mark.

16. The semiconductor device according to claim 15, wherein said wiring film comprises an aluminum film.