Semiconductor device
First Claim
1. A semiconductor device comprising:
- a first transistor;
an insulating layer over one of a source region and a drain region of the first transistor; and
a second transistor including;
a channel formation region over the insulating layer;
a gate insulating layer over the channel formation region; and
a gate electrode over the gate insulating layer,wherein a top surface of a gate electrode of the first transistor is in contact with a bottom surface of one of a source electrode and a drain electrode of the second transistor,wherein the gate insulating layer of the second transistor and the insulating layer satisfy a formula;
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Abstract
A semiconductor device with a novel structure in which stored data can be retained even when power is not supplied, and does not have a limitation on the number of write cycles. The semiconductor device includes a memory cell including a first transistor, a second transistor, and an insulating layer placed between a source region or a drain region of the first transistor and a channel formation region of the second transistor. The first transistor and the second transistor are provided to at least partly overlap with each other. The insulating layer and a gate insulating layer of the second transistor satisfy the following formula: (ta/tb)×(∈ra/∈rb)<0.1, where ta represents the thickness of the gate insulating layer, tb represents the thickness of the insulating layer, ∈ra represents the dielectric constant of the gate insulating layer, and ∈rb represents the dielectric constant of the insulating layer.
157 Citations
21 Claims
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1. A semiconductor device comprising:
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a first transistor; an insulating layer over one of a source region and a drain region of the first transistor; and a second transistor including; a channel formation region over the insulating layer; a gate insulating layer over the channel formation region; and a gate electrode over the gate insulating layer, wherein a top surface of a gate electrode of the first transistor is in contact with a bottom surface of one of a source electrode and a drain electrode of the second transistor, wherein the gate insulating layer of the second transistor and the insulating layer satisfy a formula; - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. A semiconductor device comprising:
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a first transistor; an insulating layer over one of a source region and a drain region of the first transistor; and a second transistor including; a channel formation region over the insulating layer; a gate insulating layer over the channel formation region; and a gate electrode over the gate insulating layer, wherein a level of a top surface of a gate electrode of the first transistor is substantially the same as a level of a top surface of the insulating layer, wherein the gate electrode of the first transistor is electrically connected to one of a source electrode and a drain electrode of the second transistor, wherein the gate insulating layer of the second transistor and the insulating layer satisfy a formula; - View Dependent Claims (9, 10, 11, 12, 13, 14)
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15. A semiconductor device comprising:
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a first transistor; an insulating layer over one of a source region and a drain region of the first transistor; and a second transistor including; a channel formation region over the insulating layer; a gate insulating layer over the channel formation region; and a gate electrode over the gate insulating layer, wherein a top surface of a gate electrode of the first transistor is in contact with a bottom surface of one of a source electrode and a drain electrode of the second transistor, wherein a channel formation region of the first transistor comprises silicon, wherein the channel formation region of the second transistor comprises an oxide semiconductor, wherein the gate insulating layer of the second transistor and the insulating layer satisfy a formula; - View Dependent Claims (16, 17, 18, 19, 20, 21)
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Specification