Delay compensation for variable cable length

• US 9,319,100 B2
• Filed: 08/12/2013
• Issued: 04/19/2016
• Est. Priority Date: 08/12/2013
• Status: Active Grant

• Current Assignee: Schweitzer Engineering Laboratories, Incorporated
• Original Assignee: Schweitzer Engineering Laboratories, Incorporated
• Inventors: Achanta, Srinivas, Ahsan, Hidayatullah
• Primary Examiner(s): Bolourchi, Nader
• Application Number:
  US13/964,786
• Publication Number:
  US 20150043697A1
• Time in Patent Office: 981 Days
• Field of Search: 375/371
• US Class Current: 1/1
• CPC Class Codes: H02J 13/00 Circuit arrangements for providing remote indication of network conditions, e.g. an instantaneous record of the open or closed condition of each circuitbreaker in the network; Circuit arrangements for providing remote control of switching means in a power distribution network, e.g. switching in and out of current consumers by using a pulse code signal carried by the network
• CPC Class Codes: H02J 13/00002 characterised by monitoring
• CPC Class Codes: H02J 13/00034 the elements or equipment being or involving an electric power substation
• CPC Class Codes: H04B 3/04 Control of transmission; Equalising
• CPC Class Codes: H04J 3/0638 Clock or time synchronisation among nodes; Internode synchronisation synchronization for ring networks H04L12/422; data switching networks with synchronous transmission H04L12/43
• CPC Class Codes: H04J 3/065 using timestamps
• CPC Class Codes: H04J 3/0667 Bidirectional timestamps, e.g. NTP or PTP for compensation of clock drift and for compensation of propagation delays arrangements for monitoring round trip delays in packet switching networks H04L43/0864
• CPC Class Codes: H04J 3/0697 Synchronisation in a packet node
• CPC Class Codes: Y02E 60/00 Enabling technologies; Technologies with a potential or indirect contribution to GHG emissions mitigation
• CPC Class Codes: Y04S 10/30 State monitoring, e.g. fault, temperature monitoring, insulator monitoring, corona discharge

Abstract

The present application discloses a time distribution device capable of providing a synchronized time signal to a plurality of end devices connected to the time distribution device with cables of various lengths. The time distribution device may receive a time signal, generate a time reference based on the received time signal, compensate the time reference for hardware delay, and overcompensate the time reference for a delay caused by a maximum cable length. Prior to being distributed to various end devices, each being connected with the time distribution device by cables of varying length, this overcompensated time reference may then be delayed by an amount based on the cable length connecting each respective end device such that the arrival of each of the synchronized time references at the various end devices is synchronized.

Claims

1. A method comprising:

receiving, at a time distribution device, a time signal;

generating a time reference based on the received time signal;

overcompensating the time reference for a hardware delay of the time distribution device and, for a maximum cable length delay, to produce an overcompensated time reference;

for a first end device, adding a first delay to the overcompensated time reference based on a difference between the maximum cable length delay and a delay related to a cable length between the time distribution device and the first end device, to create a first end device time reference;

for a second end device, adding a second delay to the overcompensated time reference based on a difference between the maximum cable length delay and a delay related to a cable length between the time distribution device and the second end device, to create a second end device time reference;

transmitting the first end device time reference to the first end device, and,

transmitting the second end device time reference to the second end device.

3. The method of claim 1, wherein generating the time reference is performed by a Field-Programmable Gate Array (FPGA).

4. The method of claim 3, wherein adding the first delay and the second delay to the overcompensated time reference is performed by a plurality of registers of the FPGA.

6. The method of claim 1, further comprising encoding a time data on the time reference.

7. The method of claim 1, wherein the maximum cable length comprises a maximum allowed cable length.

8. The method of claim 1, wherein the maximum cable length comprises the longer of the cable length between the time distribution device and the first end device and the cable length between the time distribution device and the second end device.

9. The method of claim 1, further comprising:

for a third end device, adding a third delay to the overcompensated time reference based on a difference between the maximum cable length and a cable length between the time distribution device and the third end device, to create a third end device time reference; and

,

transmitting the third end device time reference to the third end device.

2. The method of 1, further comprising receiving the cable length between the time distribution device and the first end device and the cable length between the time distribution device and the second end device.

5. The method of claim 2, further comprising calculating the first delay based on the received cable length to the first end device and calculating the second delay based on the received cable length to the second device.

10. A time distribution device for receiving and distributing a synchronized time reference to a plurality of end devices, comprising:

a receiver configured to receive a time signal;

a time reference generator configured to

generate a time reference based on the time signal;

overcompensate the time reference for a hardware delay of the time distribution device and, for a maximum cable length delay to produce an overcompensated time reference; and

for a first end device, add a first delay to the overcompensated time reference based on a difference between the maximum cable length delay and a delay related to a cable length between the time distribution device and the first end device to create a first end device time reference;

for a second end device, add a second delay to the overcompensated time reference based on a difference between the maximum cable length delay and a delay related to a cable length between the time distribution device and the second end device to create a second end device time reference; and

a transmitter configured to transmit the first end device time reference to the first end device and the second end device time reference to the second end device.

11. The time distribution device of claim 10, further comprising a user interface component configured to receive the cable length between the time distribution device and the first end device and the cable length between the time distribution device and the second end device.

12. The time distribution device of claim 10, wherein the time reference generation component comprises a Field-Programmable Gate Array (FPGA).

13. The time distribution device of claim 12, wherein the FPGA comprises a plurality of registers configured to add the first delay and the second delay to the overcompensated time reference.

14. The time distribution device of claim 13, further comprising a processing unit configured to update the plurality of registers based on the received cable length to the first end device and the received cable length to the second end device.

15. The time distribution device of claim 10, further comprising a time data encoder to encode a time data from the time signal on the time reference.

16. The time distribution device of claim 10, wherein the maximum cable length comprises a maximum allowed cable length.

17. The time distribution device of claim 10, wherein the maximum cable length comprises the longer of the cable length between the time distribution device and the first end device and the cable length between the time distribution device and the second end device.

18. The time distribution device of claim 10,

wherein the time reference generator is further configured to add a third delay to the overcompensated time reference based on a difference between the maximum cable length and a cable length between the time distribution device and the third end device to create a third end device time reference for a third end device;

and

wherein the transmitter is further configured to transmit the third end device time reference to the third end device.