Patterned strained semiconductor substrate and device

• US 9,515,140 B2
• Filed: 01/16/2008
• Issued: 12/06/2016
• Est. Priority Date: 07/23/2004
• Status: Active Grant

• Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Original Assignee: GlobalFoundries, Inc.
• Inventors: Cheng, Kangguo, Divakaruni, Ramachandra
• Primary Examiner(s): REAMES, MATTHEW L
• Application Number:
  US12/015,272
• Publication Number:
  US 20080135874A1
• Time in Patent Office: 3,247 Days
• Field of Search: 257/18, 257/192, 257/347, 257/E29.193
• US Class Current: 1/1
• CPC Class Codes: H01L 21/823412 with a particular manufacturing method of the channel structures, e.g. channel implants, halo or pocket implants, or channel materials
• CPC Class Codes: H01L 29/1054 with a variation of the composition, e.g. channel with strained layer for increasing the mobility
• CPC Class Codes: H01L 29/739 controlled by field-effect, e.g. bipolar static induction transistors [BSIT] unijunction transistors H01L29/705
• CPC Class Codes: H01L 29/78687 with a multilayer structure or superlattice structure

Abstract

A method that includes forming a pattern of strained material and relaxed material on a substrate; forming a strained device in the strained material; and forming a non-strained device in the relaxed material is disclosed. In one embodiment, the strained material is silicon (Si) in either a tensile or compressive state, and the relaxed material is Si in a normal state. A buffer layer of silicon germanium (SiGe), silicon carbon (SiC), or similar material is formed on the substrate and has a lattice constant/structure mis-match with the substrate. A relaxed layer of SiGe, SiC, or similar material is formed on the buffer layer and places the strained material in the tensile or compressive state. In another embodiment, carbon-doped silicon or germanium-doped silicon is used to form the strained material. The structure includes a multi-layered substrate having strained and non-strained materials patterned thereon.

Claims

1. An electrical device, comprising:

a pattern of strained material and relaxed material formed on a substrate;

a first device formed in the strained material;

a second device formed in the relaxed material; and

a second strained material formed proximate the strained material and the relaxed material,

wherein the strained material is in a compressive state and the second strained material is in a tensile state;

the second strained material is different from the strained material;

at least one of the strained material and the second strained material has a same thickness as the relaxed material;

the strained material contacts the relaxed material at a first junction;

the strained material contacts the second strained material at a second junction;

the substrate comprises a substrate material having an upper surface;

the strained material comprises a germanium-doped silicon layer formed over and contacting the upper surface at a first location;

the second strained material comprises a carbon-doped layer formed over and contacting the upper surface at a second location; and

the relaxed material is formed over and contacting the upper surface at a third location.