Initialization scheme during dual programming of a memory system
First Claim
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1. A method comprising:
- establishing, for a memory system, a primary update meta-block and a secondary update meta-block for dual programming in one or more streams;
cycling the primary update meta-block and the secondary update meta-block by utilizing a free block list;
storing a stream index and a free block list index in an error correction code (ECC) page header of pages of both the primary update meta-block and the secondary update meta-block; and
determining, upon a power cycle in the memory system, the primary update meta-block and the secondary update meta-block for the one or more streams utilizing a comparison of the ECC page header.
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Abstract
A memory system or flash memory device may include mechanism for handling power loss with a dual programming architecture. The state of primary and secondary blocks may be reconstructed to a state immediately preceding a power loss. The reconstruction may include comparing error correction code (ECC) headers of blocks to recreate a block exchange with fewer control updates. The comparison can be used to identify a primary and secondary block. The header may identify a particular stream, identify a free block, identify a release block, and other information.
9 Citations
20 Claims
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1. A method comprising:
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establishing, for a memory system, a primary update meta-block and a secondary update meta-block for dual programming in one or more streams; cycling the primary update meta-block and the secondary update meta-block by utilizing a free block list; storing a stream index and a free block list index in an error correction code (ECC) page header of pages of both the primary update meta-block and the secondary update meta-block; and determining, upon a power cycle in the memory system, the primary update meta-block and the secondary update meta-block for the one or more streams utilizing a comparison of the ECC page header. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12)
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13. A method in a dual programming memory system comprising:
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replaying a block exchange to identify a primary block and a secondary block immediately before a power cycle by starting with an initial primary block and an initial secondary block; and comparing an error correction code (ECC) page header for each of the blocks during the replaying, wherein the primary block and the secondary block are identified when the ECC page headers match. - View Dependent Claims (14, 15, 16)
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17. A memory initialization method in a dual programming scheme comprising:
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utilizing, for the dual programming scheme, a primary update block and a secondary update block in one or more streams; cycling the primary update block and the secondary update block by utilizing a free block list to use a free block from the free block list as the secondary update block; storing initialization information in an error correction code (ECC) page header of the free blocks from the free block list; and initializing, upon a power loss, the primary update block and the secondary update block using the initialization information by comparing ECC page headers of the primary update block and the secondary update block as blocks are cycled. - View Dependent Claims (18, 19, 20)
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Specification